IP Library › Granted Patent US 10,756,761
Granted Patent B2
US 10,756,761 · App. 16/344,260 · Granted Aug 25, 2020

Method for dividing carrying block of LDPC code and apparatus therefor

Inventors: Kwangseok Noh (Seoul, KR); Bonghoe Kim (Seoul, KR); Jinwoo Kim (Seoul, KR); Ilmu Byun (Seoul, KR); Jongwoong Shin (Seoul, KR); Seunggye Hwang (Seoul, KR)
Assignee: LG Electronics Inc.
H03M13/1102H03M13/155H03M13/251H04L1/0057H04L1/0061
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Quick Facts
Patent No.
US 10,756,761
App. No.
16/344,260
Granted
Aug 25, 2020
Kind
B2
Abstract

Disclosed are a method for dividing a carrying block of a Low Density Parity Check (LDPC) code and an apparatus therefor. The method for dividing a LDPC code of the present disclosure can obtain a high throughput by using a limited size of shifting network. Moreover, it is possible to prevent degradation in performance due to a minimum size of code block by performing shortening for a large size of code block while minimizing the number of code blocks. Furthermore, in selection of a minimum size of code block, since a minimum size of code block is selected on the basis of shortening for a relatively large size of code block, it is possible to increase the size of the minimum size of code block.

Claims (36)

1. A method for segmenting a transport block of a Low Density Parity Check (LDPC) code by a terminal having a 2 n shifting network, the method comprising:

determining a number of code blocks, based on a maximum lifting value for the transport block among a plurality of predetermined lifting values under a preconfigured condition,

wherein the plurality of predetermined lifting values take a form of A×2 n , where A is an integer greater than or equal to 1 and n is an integer greater than or equal to 0, and

selecting at least one lifting value among the plurality of predetermined lifting values, for a first length obtained by subtracting a length based on the determined number of code blocks from the transport block;

segmenting the transport block into a plurality of code blocks based on the selected at least one lifting value and the determined number of code blocks; and

transmitting the segmented code blocks,

wherein the preconfigured condition comprises determining the number of code blocks based on the maximum lifting value such that the first length is greater than a length of the code blocks based on the maximum lifting value and smaller than twice the length of the code blocks based on the maximum lifting value,

wherein selecting at least one lifting value comprises:

selecting a greatest lifting value, among lifting values having a minimum information bit length smaller than the first length in the plurality of predetermined lifting values, until a sum of a length of a code block related to the at least one lifting value and a length related to the determined number of code blocks based on the maximum lifting value exceeds a length of the transport block; and

repeating update of the first length by subtracting a minimum information bit length related to the selected lifting value from the first length.

2. The method of claim 1 , wherein the minimum information bit length is a length obtained by applying maximum shortening to an information bit length based on a related lifting value.

3. The method of claim 1 , the method further comprising:

performing shortening on at least one code block having a maximum length among the plurality of code blocks.

4. The method of claim 3 , wherein the plurality of code blocks include a plurality of maximum length code blocks,

wherein shortening of same scale is performed on the plurality of maximum length code blocks.

5. The method according to claim 1 , the method further comprising:

transmitting information related to the number of the code blocks.

6. The method according to claim 1 , the method further comprising:

transmitting information related to the selected at least one lifting value.

7. A terminal of a wireless communication system, the terminal comprising:

a transceiver configured to transmit and receive signals;

a memory; and

at least one processor configured to control the transceiver and the memory,

wherein the at least one processor is configured to segment a transport block of a Low Density Parity Check (LDPC) code based on a 2 n shifting network,

wherein the at least one processor is further configured to:

determine a number of code blocks, based on a maximum lifting value for the transport block among a plurality of predetermined lifting values under a preconfigured condition;

select at least one lifting value among the plurality of predetermined lifting values, for a first length obtained by subtracting a length based on the determined number of code blocks from the transport block;

segment the transport block into a plurality of code blocks based on the selected at least one lifting value and the determined number of code blocks; and

transmit the segmented code blocks,

wherein the preconfigured condition comprises determining the number of code blocks based on the maximum lifting value such that the first length is greater than a length of the code blocks based on the maximum lifting value and smaller than twice the length of the code blocks based on the maximum lifting value,

wherein the at least one lifting value is selected by selecting a greatest lifting value, among lifting values having a minimum information bit length smaller than the first length in the plurality of predetermined lifting values, until a sum of a length of a code block related to the at least one lifting value and a length related to the determined number of code blocks based on the maximum lifting value exceeds a length of the transport block, and repeating update of the first length by subtracting a minimum information bit length related to the selected lifting value from the first length, and

wherein the plurality of predetermined lifting values take a form of A×2 n , where A is an integer greater than or equal to 1 and n is an integer greater than or equal to 0.

8. The terminal of claim 7 , wherein the minimum information bit length is a length obtained by applying maximum shortening to an information bit length based on a related lifting value.

9. The terminal of claim 7 , wherein the processor is further configured to perform shortening on at least one code block having a maximum length among the plurality of code blocks.

10. The terminal of claim 9 , wherein the plurality of code blocks include a plurality of maximum length code blocks,

wherein shortening of same scale is performed on the plurality of maximum length code blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2019
From: NOH, KWANGSEOK; KIM, BONGHOE; KIM, JINWOO; BYUN, ILMU; SHIN, JONGWOONG; HWANG, SEUNGGYE
To: LG ELECTRONICS INC.
Reel/Frame 050149/0148 →
Continuity (2)
Provisional Application 62412264 · Oct 24, 2016
Related Publication 20200186167A1 · Jun 11, 2020