Three dimensional semiconductor memory including pillars having joint portions between columnar sections
According to one embodiment, a semiconductor memory includes a plurality of conductors stacked with insulators being interposed therebetween and a pillar through the plurality of conductors. The pillar includes a first columnar section, a second columnar section, and a joint portion between the first columnar section and the second columnar section. The pillar comprises portions that cross the respective conductors and that each function as part of a transistor. The plurality of conductors include a first conductor. The first conductor is closest to the joint portion among the plurality of conductors through the second columnar section, and includes a bending portion formed along the joint portion.
1. A semiconductor memory comprising:
a plurality of conductors stacked with insulators being interposed therebetween; and
a pillar through the plurality of conductors, the pillar including a first columnar section, a second columnar section above the first columnar section, and a joint portion between the first columnar section and the second columnar section, and the pillar comprising portions that cross the respective conductors, the portions respectively functioning as part of a transistor,
wherein the plurality of conductors include a first conductor that is closest to the joint portion among the plurality of conductors through the second columnar section, and the first conductor includes a bending portion formed along the joint portion.
2. The memory of claim 1 , wherein the joint portion abuts each of the first columnar section and the second columnar section.
3. The memory of claim 2 , wherein an outer diameter of the joint portion in a cross-section area parallel to a surface of a substrate, is larger than an outer diameter of the second columnar section in a cross-section area parallel to the surface of the substrate and including a boundary portion between the second columnar section and the joint portion.
4. The memory of claim 3 , wherein the outer diameter of the joint portion is larger than an outer diameter of the first columnar section in a cross-section area parallel to the substrate and including a boundary portion between the first columnar section and the joint portion.
5. The memory of claim 3 , wherein a distance, in a first direction that crosses the surface of the substrate, between a first cross-section area of the pillar and a second cross-section area of the pillar is smaller than a thickness of the first conductor in the first direction,
the first cross-section area is parallel to the surface of the substrate and includes a portion of the bending portion most distant from the substrate in the first direction, and
the second cross-section area is parallel to the surface of the substrate and includes a portion of the bending portion closest to the substrate in the first direction.
6. The memory of claim 5 , wherein the distance is equal to or smaller than a half of the thickness.
7. The memory of claim 1 , wherein the plurality of conductors include a second conductor that is second closest to the joint portion among the plurality of conductors through the second columnar section, and the second conductor includes a portion bending indirectly along the joint portion.
8. The memory of claim 1 , wherein a transistor provided in a portion where the first conductor crosses the second columnar section is not used for storing data.
9. The memory of claim 1 , wherein the plurality of conductors include a third conductor that is closest to the joint portion among the plurality of conductors through the first columnar section,
a first distance is smaller than a second distance,
the first distance is a distance, in a stacking direction of the plurality of conductors, between adjacent conductors among the plurality of conductors through the second columnar section, and
the second distance is a distance in the stacking direction between the first conductor and the third conductor.
10. The memory of claim 9 , wherein the third conductor has no portion bending along the joint portion.
11. The memory of claim 9 , wherein a transistor provided in a portion where the third conductor crosses the first columnar section is not used for storing data.
12. A semiconductor memory comprising:
a plurality of conductors stacked with insulators being interposed therebetween; and
a pillar through the plurality of conductors, the pillar including a first columnar section and a second columnar section on the first columnar section, and the pillar comprising portions that cross the respective conductors, the portions respectively functioning as part of a transistor,
wherein the plurality of conductors include a first conductor that is closest to the first columnar section among the plurality of conductors through the second columnar section, and the first conductor includes a bending portion formed along the first columnar section.
13. The memory of claim 12 , wherein, in a boundary portion between the first columnar section and the second columnar section, an outer diameter of the first columnar section in a cross-section area parallel to a surface of a substrate is larger than an outer diameter of the second columnar section in a cross-section area parallel to the surface of the substrate.
14. The memory of claim 13 , wherein a distance, in a first direction that crosses the surface of the substrate, between a first cross-section area of the pillar and a second cross-section area of the pillar is smaller than a thickness of the first conductor in the first direction,
the first cross-section area is parallel to the surface of the substrate and includes a portion of the bending portion most distant from the substrate in the first direction, and
the second cross-section area is parallel to the surface of the substrate and includes a portion of the bending portion closest to the substrate in the first direction.
15. The memory of claim 14 , wherein the distance is equal to or smaller than a half of the thickness.
16. The memory of claim 12 , wherein the plurality of conductors include a second conductor that is second closest to the first columnar section among the plurality of conductors through the second columnar section, and the second conductor includes a portion bending indirectly along the first columnar section.
17. The memory of claim 12 , wherein a transistor provided in a portion where the first conductor crosses the second columnar section is not used for storing data.
18. The memory of claim 12 , wherein the plurality of conductors include a third conductor that is closest to the second columnar section among the plurality of conductors through the first columnar section,
a first distance is smaller than a second distance,
the first distance is a distance, in a stacking direction of the plurality of conductors, between adjacent conductors among the plurality of conductors through the second columnar section,
the second distance is a distance in the stacking direction between the first conductor and the third conductor.
19. The memory of claim 18 , wherein the third conductor has no portion bending along the joint portion.
20. The memory of claim 18 , wherein a transistor provided in a portion where the third conductor crosses the first columnar section is not used for storing data.
21. A semiconductor memory comprising:
a plurality of conductors stacked with insulators being interposed therebetween; and
a plurality of pillars each passing through the plurality of conductors, the pillars each including a first columnar section, and a second columnar section above the first columnar section, the pillars each comprising portions that cross the respective conductors, the portions respectively functioning as part of a transistor, wherein
the plurality of conductors include a first conductor among the plurality of conductors through the second columnar section,
the plurality of pillars include a first pillar and a second pillar adjacent to each other, and
a first distance, in a stacking direction of the plurality of conductors, between a substrate and an upper end of the first conductor at a position between the first and second pillars is smaller than a second distance in the stacking direction between the substrate and an upper end of a portion where the first conductor comes into contact with the first pillar.
22. The memory of claim 21 , wherein
the plurality of conductors include a second conductor through the first columnar section, and
a third distance in the stacking direction between the substrate and an upper end of the second conductor at a position between the first and second pillars is equal to a fourth distance in the stacking direction between the substrate and an upper end of a portion where the second conductor comes into contact with the first pillar.
23. The memory of claim 21 , wherein
the plurality of conductors include a third conductor through the second columnar section and disposed above the first conductor, and
a fifth distance in the stacking direction between the substrate and an upper end of the third conductor at a position between the first and second pillars is equal to a sixth distance in the stacking direction between the substrate and an upper end of a portion where the third conductor comes into contact with the first pillar.