IP Library Granted Patent US 10,770,570
Granted Patent B2
US 10,770,570 · App. 16/173,642 · Granted Sep 8, 2020

FinFET device and methods of forming

Inventors: Yu-Chang Lin (Hsinchu, TW); Chun-Feng Nieh (Hsinchu, TW); Huicheng Chang (Tainan, TW); Wei-Ting Chien (Hsinchu, TW); Chih-Pin Tsao (Zhubei, TW); Hou-Ju Li (Hsinchu, TW); Tien-Shun Chang (New Taipei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L29/66803H01L21/2254H01L21/324H01L21/823821H01L27/0924H01L29/0847H01L29/66492H01L29/66545H01L29/66636H01L29/785H01L29/7833H01L29/7851
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Quick Facts
Patent No.
US 10,770,570
App. No.
16/173,642
Granted
Sep 8, 2020
Kind
B2
Abstract

A finFET device and methods of forming a finFET device are provided. The method includes depositing a dummy gate over and along sidewalls of a fin extending upwards from a semiconductor substrate, forming a first gate spacer along a sidewall of the dummy gate, and plasma-doping the first gate spacer with carbon to form a carbon-doped gate spacer. The method further includes forming a source/drain region adjacent a channel region of the fin and diffusing carbon from the carbon-doped gate spacer into a first region of the fin to provide a first carbon-doped region. The first carbon-doped region is disposed between at least a portion of the source/drain region and the channel region of the fin.

Claims (38)

1. A fin field effect transistor (finFET) device comprising:

a fin extending upwards from a semiconductor substrate;

a gate stack over and along sidewalls of a channel region of the fin;

a source/drain region adjacent the fin;

a gate spacer disposed along a sidewall of the gate stack;

a first carbon-doped region disposed along a bottom surface and a sidewall of the source/drain region, wherein the first carbon-doped region is between the sidewall of the source/drain region and the channel region along a line parallel to a major surface of the semiconductor substrate; and

a second carbon-doped region under the gate spacer and between the first carbon-doped region and the channel region, wherein the first carbon-doped region and the second carbon-doped region have different concentrations of carbon.

2. The finFET device of claim 1 , wherein the second carbon-doped region is disposed in a lightly-doped drain (LDD) region of the finFET device.

3. The finFET device of claim 1 , wherein the gate spacer comprises carbon dopants.

4. The finFET device of claim 1 , wherein the second carbon-doped region has a lower concentration of carbon than the first carbon-doped region.

5. The finFET device of claim 4 , wherein a carbon concentration of the first carbon-doped region is 3×10 20 cm −3 or greater, and wherein a carbon concentration of the second carbon-doped region is in the range of 1×10 19 cm −3 to 5×10 1 cm −3 .

6. The finFET device of claim 1 , wherein a ratio of a carbon concentration of the first carbon-doped region at a top of the fin to carbon concentrations of the first carbon-doped region at a sidewall of the fin to a carbon concentration of the first carbon-doped region at a bottom of the fin is in the range of 1:0.65:0.65 to 1:0.9:0.9.

7. The finFET device of claim 1 , wherein the first carbon-doped region extends lower than the second carbon-doped region.

8. The finFET device of claim 1 , wherein a carbon concentration of the first carbon-doped region increases in a direction towards the source/drain region.

9. A fin field effect transistor (finFET) device comprising:

a semiconductor fin disposed between isolation regions;

a gate stack over and along sidewalls of a channel region of the semiconductor fin, wherein the channel region is doped with carbon;

a source/drain region adjacent the semiconductor fin;

a carbon-doped gate spacer disposed along a sidewall of the gate stack;

a carbon film over the carbon-doped gate spacer, wherein the carbon film extends along the sidewall of the gate stack; and

a first carbon-doped region under the carbon-doped gate spacer.

10. The finFET device of claim 9 further comprising a second carbon-doped region disposed along sidewalls and a bottom surface of the source/drain region.

11. The finFET device of claim 10 , wherein the second carbon-doped region is disposed between at least a portion of the source/drain region and the first carbon-doped region.

12. The finFET device of claim 10 , wherein the first carbon-doped region has a lower concentration of carbon than the second carbon-doped region.

13. The finFET device of claim 10 , wherein the second carbon-doped region extends under the carbon-doped gate spacer.

14. The finFET device of claim 9 further comprising one or more additional gate spacers over the carbon film, wherein the one or more additional gate spacers extend along the sidewall of the gate stack.

15. A fin field effect transistor (finFET) device comprising:

a semiconductor fin extending from a semiconductor substrate;

a gate stack over and along sidewalls of the semiconductor fin;

a carbon-comprising gate spacer disposed along a sidewall of the gate stack;

a lightly doped drain (LDD) region under the carbon-comprising gate spacer, wherein the LDD region comprises carbon;

an epitaxial source/drain region adjacent the LDD region; and

carbon-doped semiconductor liner disposed along sidewalls and a bottom surface of the epitaxial source/drain region, wherein the carbon-doped semiconductor liner is disposed between the LDD region and a sidewall of the epitaxial source/drain region along a line parallel to a major surface of the semiconductor substrate, the carbon-doped semiconductor liner having a different concentration of carbon than the LDD region.

16. The finFET device of claim 15 , wherein the epitaxial source/drain region and the carbon-doped semiconductor liner extends under the carbon-comprising gate spacer.

17. The finFET device of claim 15 , wherein the carbon-doped semiconductor liner has a carbon concentration of 3×10 20 cm −3 or greater.

18. The finFET device of claim 15 , wherein the LDD region has a carbon concentration in the range of 1×10 19 cm −3 to 5×10 1 cm −3 .

19. The finFET device of claim 15 , wherein a channel region of the semiconductor fin comprises carbon.

20. The finFET device of claim 15 , wherein an interface between the carbon-doped semiconductor liner and the epitaxial source/drain region is disposed directly under the carbon-comprising gate spacer.

Continuity (3)
Division 15611599 · Jun 1, 2017
Provisional Application 62427589 · Nov 29, 2016
Related Publication 20190067458A1 · Feb 28, 2019
Cited By (2)
US 12,317,567 US 12,635,190