IP Library › Granted Patent US 10,777,569
Granted Patent B2
US 10,777,569 · App. 16/404,095 · Granted Sep 15, 2020

Method for manufacturing a semiconductor device

Inventors: Yuto Omizu (Tokyo, JP); Takashi Hashimoto (Tokyo, JP); Hideaki Yamakoshi (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L27/1157H01L21/3065H01L21/76221H01L27/11565H01L29/40117
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Quick Facts
Patent No.
US 10,777,569
App. No.
16/404,095
Granted
Sep 15, 2020
Kind
B2
Abstract

The manufacturing method of the semiconductor device includes a step of forming the gate dielectric film GI 2 and the polysilicon layer PS 2 on the main surface SUBa of the semiconductor substrate SUB, a step of forming the isolation trench TR in the semiconductor substrate SUB through the polysilicon layer PS 2 and the gate dielectric film GI 2, a step of filling the isolation trench TR with the dielectric film, and then a step of polishing the dielectric film to form the element isolation film STI in the isolation trench TR. Further, a method for manufacturing a semiconductor device comprises etching the element isolation film STI to retract the upper surface STIa of the element isolation film STI, then further depositing a polysilicon layer on the polysilicon layer PS 2 to form a gate electrode using an anisotropic dry etching method.

Claims (55)

1. A method of manufacturing a semiconductor device comprising the steps of:

(a) preparing a semiconductor substrate including a main surface and a back surface;

(b) forming a gate dielectric film on the main surface;

(c) forming a first polysilicon layer on the gate dielectric film;

(d) forming an isolation trench in the semiconductor substrate through the first polysilicon layer and the gate dielectric film;

(e) depositing a first dielectric film on the first polysilicon layer and filling the isolation trench with the first dielectric film;

(f) performing a polishing process to the first dielectric film and removing the first dielectric film on the first polysilicon layer, thereby forming an element isolation film formed of the first dielectric film in the isolation trench;

(g) etching the element isolation film and retracting a first upper surface of the element isolation film to the back surface side of the semiconductor substrate;

(h) depositing a second polysilicon layer on the element isolation film and the first polysilicon layer; and

(i) subjecting the first polysilicon layer and the second polysilicon layer to form a gate electrode by using anisotropic dry etching method.

2. The method of manufacturing the semiconductor device according to claim 1 ,

wherein the gate dielectric film includes a second dielectric film, a third dielectric film having a charge storage portion and formed on the second dielectric film, and a fourth dielectric film formed on the third dielectric film, and

wherein at the end of the step (g), the first upper surface is higher than a second upper surface of the fourth dielectric film with reference to the main surface of the semiconductor substrate.

3. The method of manufacturing the semiconductor device according to claim 1 ,

wherein at the end of the step (g), the first upper surface is lower than a third upper surface of the first polysilicon layer with reference to the main surface of the semiconductor substrate.

4. The method of manufacturing the semiconductor device according to claim 1 ,

wherein in the step (f), chemical mechanical polishing method is used as the polishing process.

5. The method of manufacturing the semiconductor device according to claim 1 , further comprising a step of:

(j) after the step (c), before the step (d), depositing a fifth dielectric film on the first polysilicon layer,

wherein in the step (d), the isolation trench is formed through the fifth dielectric film, and

wherein in the step (f), the polishing process is performed to the first dielectric film and the fifth dielectric film, and is terminated in a state which the fifth dielectric film left thinner than a thickness at the time of deposition.

6. The method of manufacturing the semiconductor device according to claim 5 ,

wherein the step (g) is performed in a state that the fifth dielectric film is left.

7. A method of manufacturing a semiconductor device comprising the steps of:

(a) preparing a semiconductor substrate including a main surface and a back surface, the main surface having a first region and a second region;

(b) forming a first gate dielectric film in the first region on the main surface and a second gate dielectric film in the second region on the main surface;

(c) forming a first polysilicon layer on the first gate dielectric film and the second gate dielectric film;

(d) forming a first isolation trench in the semiconductor substrate through the first polysilicon layer and the first gate dielectric film in the first region, and forming a second isolation trench in the semiconductor substrate through the first polysilicon layer and the second gate dielectric film in the second region;

(e) depositing a first dielectric film on the first polysilicon layer and filling the first isolation trench and the second isolation trench with the first dielectric film;

(f) performing a polishing process to the first dielectric film and removing the first dielectric film on the first polysilicon layer, thereby forming an element isolation film formed of the first dielectric film in the first isolation trench and the second isolation trench;

(g) etching the element isolation film and retracting a first upper surface of the element isolation film to the back surface side of the semiconductor substrate;

(h) depositing a second polysilicon layer on the element isolation film and the first polysilicon layer; and

(i) subjecting the first polysilicon layer and the second polysilicon layer to form a first gate electrode in the first region and a second gate electrode in the second region by using an anisotropic dry etching method.

8. The method of manufacturing the semiconductor device according to claim 7 ,

wherein the second dielectric film includes a second dielectric film, a third dielectric film formed on the second dielectric film and having a charge storage portion and a fourth dielectric film formed on the third dielectric film;

wherein at the end of the step (g), the first upper surface is higher than a second upper surface of the fourth dielectric film and lower than a third upper surface of the first polysilicon layer with reference to the main surface of the semiconductor substrate.

9. The method of manufacturing the semiconductor device according to claim 8 ,

wherein at the end of the step (g), the first upper surface is higher than a fourth upper surface of the first gate dielectric film with reference to the main surface of the semiconductor substrate.

10. The method of manufacturing the semiconductor device according to claim 7 , further comprising a step of:

(j) after the step (c), before the step (d), depositing a fifth dielectric film on the first polysilicon layer,

wherein in the step (d), the first isolation trench and the second isolation trench are formed through the fifth dielectric film, and

wherein in the step (f), the polishing process is performed to the first dielectric film and the fifth dielectric film, and is terminated in a state which the fifth dielectric film left thinner than a thickness at the time of deposition in the first region and the second region.

11. The method of manufacturing the semiconductor device according to claim 10 ,

wherein, in the first region and the second region, the step (g) is performed in a state that the fifth dielectric film is left.

12. The method of manufacturing the semiconductor device according to claim 7 ,

wherein the step (b) further comprises:

(b-1) forming the first gate dielectric film on the main surface in the first region and the second region,

(b-2) removing the first gate dielectric film in the second region and leaving the first gate dielectric film in the first region, and

(b-3) forming the second gate dielectric film on the main surface in the second region.

13. The method of manufacturing the semiconductor device according to claim 12 , further comprising a step of:

(b-4) after the step (b-1), before the step (b-2), forming a sixth dielectric film formed of a silicon nitride film, the sixth dielectric film covering the first gate dielectric film in the first region and exposing the first gate dielectric film in the second region.

14. The method of manufacturing the semiconductor device according to claim 13 ,

wherein in the step (b-3), the second dielectric film is formed by thermally oxidizing the main surface of the semiconductor substrate.

15. The method of manufacturing the semiconductor device according to claim 13 ,

wherein the step (b-4) includes a step of forming a third polysilicon layer between the first gate dielectric film and the sixth dielectric film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2019
From: OMIZU, YUTO; HASHIMOTO, TAKASHI; YAMAKOSHI, HIDEAKI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 049093/0256 →
Priority Claims (1)
JP 2018-099321 · May 24, 2018 · national
Continuity (1)
Related Publication 20190363095A1 · Nov 28, 2019