Horizontal gate all around device nanowire air gap spacer formation
The present disclosure provides an apparatus and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures includes depositing a dielectric material on a first side and a second side of a stack. The stack may include repeating pairs of a first layer and a second layer. The first side is opposite the second side and the first side and the second side have one or more recesses formed therein. The method includes removing the dielectric material from the first side and the second side of the stack. The dielectric material remains in the one or more recesses. The method includes the deposition of a stressor layer and the formation of one or more side gaps between the stressor layer and the first side and the second side of the stack.
1. A method comprising:
selectively etching material from a stack disposed on a material layer located on a substrate with a plasma comprising fluorine to create one or more recesses on each of a first side of the stack and a second side of the stack opposite from the first side, wherein the material layer comprises silicon oxide, silicon nitride, or silicon on/nitride;
depositing a dielectric material on the first side of the stack and the second side of the stack, wherein the stack includes repeating pairs of a first layer and a second layer;
removing the dielectric material from the first side of the stack and the second side of the stack, wherein the dielectric material remains in the one or more recesses of the first side and the second side; and
selectively depositing a stressor layer on regions of the first side and the second side which are unprotected by the dielectric material to form one or more gaps between the stressor layer and the dielectric material remaining in the one or more recesses of the first side and the second side of the stack, and wherein each of the gaps has a dielectric constant value of about 1.
2. The method of claim 1 , wherein the one or more recesses are created in each second layer.
3. The method of claim 1 , wherein the dielectric material comprises silicon nitride, silicon oxide, silicon oxynitride, silicon oxycarbide, silicon carbonitride, silicon oxycarbonitride, silicon materials with dopants, nitrides, oxynitrides, or a mixture thereof.
4. The method of claim 3 , wherein the dielectric material is deposited by an ALD process.
5. The method of claim 1 , wherein each of the one or more gaps contains oxygen, nitrogen, and at least one of hydrogen, helium, or a mixture thereof.
6. The method of claim 1 , wherein each first layer of the stack is a silicon layer and each second layer of the stack is a SiGe layer.
7. The method of claim 1 , further comprising:
forming a gate structure on top of the stack.
8. The method of claim 1 , wherein the stack includes at least 4 repeating pairs.
9. The method of claim 1 , wherein the plasma further comprises oxygen ions and radicals.
10. The method of claim 1 , wherein the plasma further comprises nitrogen ions and radicals.
11. The method of claim 1 , wherein the dielectric material comprises a silicon oxynitride layer with a thickness of about 5 Å to about 50 Å.
12. A method comprising:
depositing a stack on a material layer located on a substrate in a process chamber, wherein the stack comprises repeating pairs of a first layer and a second layer, and wherein the material layer comprises silicon oxide, silicon nitride, or silicon oxynitride;
selectively etching material from the stack with a plasma comprising fluorine to create one or more recesses on each of a first side of the stack and a second side of the stack opposite from the first side;
depositing a dielectric material on the first side, the second side, and within the one or more recesses;
removing the dielectric material from each of the first side of the stack and the second side of the stack, wherein the dielectric material remains within the one or more recesses of the first side of the stack and the second side of the stack; and
selectively depositing a stressor layer on regions of the first side and the second side which are unprotected by the dielectric material to form one or more gaps between the stressor layer and the dielectric material remaining in the one or more recesses of the first side and the second side of the stack, and wherein each of the daps has a dielectric constant value of about 1.
13. The method of claim 12 , wherein the substrate comprises silicon.
14. The method of claim 12 , wherein the one or more recesses are created at the second layer.
15. The method of claim 12 , wherein the dielectric material comprises silicon nitride, silicon oxide, silicon oxynitride, silicon oxycarbide, silicon carbonitride, silicon oxycarbonitride, silicon materials with dopants, nitrides, oxynitrides, or a mixture thereof.
16. The method of claim 12 , wherein each of the one or more gaps contains oxygen, nitrogen, and at least one of hydrogen, argon, helium, or a mixture thereof.
17. The method of claim 12 , wherein each first layer of the stack is a silicon layer and each second layer of the stack is a SiGe layer.
18. The method of claim 12 , wherein the stack includes at least 4 repeating pairs.
19. The method of claim 12 , wherein the plasma further comprises oxygen ions and radicals.
20. The method of claim 12 , wherein the plasma further comprises nitrogen ions and radicals.