IP Library › Granted Patent US 10,782,979
Granted Patent B2
US 10,782,979 · App. 15/489,846 · Granted Sep 22, 2020

Restoring saved architected registers and suppressing verification of registers to be restored

Inventors: Michael K. Gschwind (Chappaqua, NY); Chung-Lung K. Shum (Wappingers Falls, NY); Timothy J. Slegel (Staatsburg, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F9/3863G06F9/30043G06F9/384G06F9/461
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,782,979
App. No.
15/489,846
Granted
Sep 22, 2020
Kind
B2
Abstract

A reload multiple instruction is used to restore a set of architected registers saved by a spill multiple instruction. The reload multiple instruction is executed, and the executing includes determining the set of architected registers to be restored, which is specified by the reload multiple instruction. The set of architected registers is restored from a selected snapshot that maps architected registers to physical registers. The restoring replaces one or more physical registers currently assigned to one or more architected registers of the set of architected registers with one or more physical registers of the selected snapshot corresponding to the set of architected registers.

Claims (41)

1. A computer program product for facilitating processing within a computing environment, the computer program product comprising:

a computer readable storage medium readable by a processing circuit and storing instructions for performing a method comprising:

obtaining a reload multiple instruction to restore a set of architected registers, the set of architected registers comprising a plurality of architected registers, and wherein the reload multiple instruction is a single architecture instruction architecturally defined to be paired with a spill multiple instruction used to save the set of architected registers; and

executing the reload multiple instruction, the executing including:

determining the set of architected registers to be restored, the set of architected registers being specified by the reload multiple instruction; and

restoring the set of architected registers from a selected snapshot that maps architected registers to physical registers, the restoring replacing one or more physical registers currently assigned to one or more architected registers of the set of architected registers with one or more physical registers of the selected snapshot corresponding to the set of architected registers, and wherein based on the reload multiple instruction being architecturally defined to be paired with the spill multiple instruction, verification that the set of architected registers being restored matches the set of architected registers saved is suppressed.

2. The computer program product of claim 1 , wherein the reload multiple instruction is architecturally defined to ignore memory modifications occurring between saving of the set of architected registers and restoring the set of architected registers.

3. The computer program product of claim 1 , wherein the method further comprises executing the spill multiple instruction to save the set of architected registers, the reload multiple instruction being architecturally matched to the spill multiple instruction such that verification of a matching of the reload multiple instruction and the spill multiple instruction is avoided.

4. The computer program product of claim 3 , wherein the spill multiple instruction has associated therewith an operation code specifying a spill multiple operation, and a plurality of registers to be used to designate the set of architected registers to be saved.

5. The computer program product of claim 4 , wherein the spill multiple instruction includes one or more fields used to specify an address in memory used to store contents of the set of architected registers.

6. The computer program product of claim 1 , wherein the reload multiple instruction has associated therewith an operation code specifying a reload multiple operation, and a plurality of registers to be used to designate the set of architected registers to be restored.

7. The computer program product of claim 6 , wherein the reload multiple instruction includes one or more fields used to specify an address in memory to be used in retrieving values to load into the set of architected registers.

8. The computer program product of claim 1 , wherein the method further comprises:

determining whether a snapshot corresponding to the set of architected registers is available; and

performing the restoring using the selected snapshot, based on determining the snapshot corresponding to the set of architected registers is available.

9. The computer program product of claim 8 , wherein the method further comprises restoring the set of architected registers by loading values from memory into the set of architected registers, based on determining the snapshot corresponding to the set of architected registers is unavailable.

10. A computer system for facilitating processing within a computing environment, the computer system comprising:

a memory; and

a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising:

obtaining a reload multiple instruction to restore a set of architected registers, the set of architected registers comprising a plurality of architected registers, and wherein the reload multiple instruction is a single architecture instruction architecturally defined to be paired with a spill multiple instruction used to save the set of architected registers; and

executing the reload multiple instruction, the executing including:

determining the set of architected registers to be restored, the set of architected registers being specified by the reload multiple instruction; and

restoring the set of architected registers from a selected snapshot that maps architected registers to physical registers, the restoring replacing one or more physical registers currently assigned to one or more architected registers of the set of architected registers with one or more physical registers of the selected snapshot corresponding to the set of architected registers, and wherein based on the reload multiple instruction being architecturally defined to be paired with the spill multiple instruction, verification that the set of architected registers being restored matches the set of architected registers saved is suppressed.

11. The computer system of claim 10 , wherein the reload multiple instruction is architecturally defined to ignore memory modifications occurring between saving of the set of architected registers and restoring the set of architected registers.

12. The computer system of claim 10 , wherein the method further comprises executing the spill multiple instruction to save the set of architected registers, the reload multiple instruction being architecturally matched to the spill multiple instruction such that verification of a matching of the reload multiple instruction and the spill multiple instruction is avoided.

13. The computer system of claim 10 , wherein the reload multiple instruction has associated therewith an operation code specifying a reload multiple operation, and a plurality of registers to be used to designate the set of architected registers to be restored.

14. The computer system of claim 10 , wherein the method further comprises:

determining whether a snapshot corresponding to the set of architected registers is available; and

performing the restoring using the selected snapshot, based on determining the snapshot corresponding to the set of architected registers is available.

15. The computer system of claim 14 , wherein the method further comprises restoring the set of architected registers by loading values from memory into the set of architected registers, based on determining the snapshot corresponding to the set of architected registers is unavailable.

16. A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising:

obtaining, by a processor, a reload multiple instruction to restore a set of architected registers, the set of architected registers comprising a plurality of architected registers, and wherein the reload multiple instruction is a single architecture instruction architecturally defined to be paired with a spill multiple instruction used to save the set of architected registers; and

executing the reload multiple instruction, the executing including:

determining the set of architected registers to be restored, the set of architected registers being specified by the reload multiple instruction; and

restoring the set of architected registers from a selected snapshot that maps architected registers to physical registers, the restoring replacing one or more physical registers currently assigned to one or more architected registers of the set of architected registers with one or more physical registers of the selected snapshot corresponding to the set of architected registers, and wherein based on the reload multiple instruction being architecturally defined to be paired with the spill multiple instruction, verification that the set of architected registers being restored matches the set of architected registers saved is suppressed.

17. The computer-implemented method of claim 16 , wherein the reload multiple instruction is architecturally defined to ignore memory modifications occurring between saving of the set of architected registers and restoring the set of architected registers.

18. The computer-implemented method of claim 16 , further comprising executing the spill multiple instruction to save the set of architected registers, the reload multiple instruction being architecturally matched to the spill multiple instruction such that verification of a matching of the reload multiple instruction and the spill multiple instruction is avoided.

19. The computer-implemented method of claim 16 , further comprising:

determining whether a snapshot corresponding to the set of architected registers is available; and

performing the restoring using the selected snapshot, based on determining the snapshot corresponding to the set of architected registers is available.

20. The computer-implemented method of claim 19 , further comprising restoring the set of architected registers by loading values from memory into the set of architected registers, based on determining the snapshot corresponding to the set of architected registers is unavailable.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2017
From: GSCHWIND, MICHAEL K.; SHUM, CHUNG-LUNG K.; SLEGEL, TIMOTHY J.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 042043/0813 →
Continuity (1)
Related Publication 20180300149A1 · Oct 18, 2018
Cited By (1)
US 12,613,704