Pixel and display device having the same
A display device includes a display panel including a plurality of pixels and a panel driver that drives the display panel. Each of the pixels includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a first capacitor, and an emission element.
1. A pixel of a display device comprising:
a first transistor including a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node;
a second transistor including a gate electrode that is configured to receive a first gate signal, a first electrode that is configured to receive a data voltage, and a second electrode coupled to the third node;
a third transistor including a gate electrode that is configured to receive the first gate signal, a first electrode coupled to a fourth node, and a second electrode coupled to the second node;
a fourth transistor including a gate electrode that is configured to receive a second gate signal, a first electrode coupled to the fourth node, and a second electrode that is configured to receive an initialization voltage;
a fifth transistor including a gate electrode that is configured to receive a first emission control signal, a first electrode that is configured to receive a first power voltage, and a second electrode coupled to the second node;
a sixth transistor including a gate electrode that is configured to receive the first emission control signal, a first electrode coupled to the third node, and a second electrode coupled to a fifth node;
a seventh transistor including a gate electrode that is configured to receive a third gate signal, a first electrode that is configured to receive the initialization voltage, and a second electrode coupled to the fifth node;
an eighth transistor including a gate electrode that is configured to receive a second emission control signal, a first electrode coupled to the first node, and a second electrode coupled to the fourth node;
a first capacitor including a first electrode that is configured to receive the first power voltage and a second electrode coupled to the first node; and
an emission element including a first electrode coupled to the fifth node and a second electrode that is configured to receive a second power voltage.
2. The pixel of the display device of claim 1 , wherein the second emission control signal is an inversion signal of the first emission control signal.
3. The pixel of the display device of claim 1 , further comprising:
a second capacitor coupled between the second electrode of the eighth transistor and the fourth node.
4. The pixel of the display device of claim 1 , wherein the first gate signal, the second gate signal, and the third gate signal are activated more than one time in a frame, and
wherein the second emission control signal is activated once in a frame.
5. The pixel of the display device of claim 4 , wherein the gate electrode of the first transistor is initialized with the initialization voltage while the second gate signal and the second emission control signal are activated and the first gate signal, the third gate signal, and the first emission control signal are inactivated.
6. The pixel of the display device of claim 4 , wherein the first electrode of the emission element is initialized with the initialization voltage and the data voltage that compensates a threshold voltage of the first transistor is written while the first gate signal, the third gate signal, and the second emission control signal are activated and the second gate signal and the first emission control signal are inactivated.
7. The pixel of the display device of claim 4 , wherein the emission element emits light while the first emission control signal is activated and the first gate signal, the second gate signal, and the third gate signal are inactivated.
8. The pixel of the display device of claim 4 , wherein the fourth node is initialized with the initialization voltage while the second gate signal is activated and the first gate signal, the third gate signal, the first emission control signal, and the second emission control signal are inactivated.
9. The pixel of the display device of claim 4 , wherein the first electrode of the emission element is initialized with the initialization voltage and the fourth node is initialized with the data voltage while the first gate signal and the third gate signal are activated and the second gate signal, the first emission control signal and the second emission control signal are inactivated.
10. A display device comprising:
a display panel including a plurality of pixels; and
a panel driver that is configured to drive the display panel,
wherein each of the pixels includes:
a first transistor including a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node;
a second transistor including a gate electrode that is configured to receive a first gate signal, a first electrode that is configured to receive a data voltage, and a second electrode coupled to the third node;
a third transistor including a gate electrode that is configured to receive the first gate signal, a first electrode coupled to a fourth node, and a second electrode coupled to the second node;
a fourth transistor including a gate electrode that is configured to receive a second gate signal, a first electrode coupled to the fourth node, and a second electrode that is configured to receive an initialization voltage;
a fifth transistor including a gate electrode that is configured to receive a first emission control signal, a first electrode that is configured to receive a first power voltage, and a second electrode coupled to the second node;
a sixth transistor including a gate electrode that is configured to receive the first emission control signal, a first electrode coupled to the third node, and a second electrode coupled to a fifth node;
a seventh transistor including a gate electrode that is configured to receive a third gate signal, a first electrode that is configured to receive the initialization voltage, and a second electrode coupled to the fifth node;
an eighth transistor including a gate electrode that is configured to receive a second emission control signal, a first electrode coupled to the first node, and a second electrode coupled to the fourth node;
a first capacitor including a first electrode that is configured to receive the first power voltage and a second electrode coupled to the first node; and
an emission element including a first electrode coupled to the fifth node and a second electrode that is configured to receive a second power voltage.
11. The display device of claim 10 , wherein the second emission control signal is an inversion signal of the first emission control signal.
12. The display device of claim 10 , wherein further comprising:
a second capacitor coupled between the second electrode of the eighth transistor and the fourth node.
13. The display device of claim 10 , wherein the panel driver is configured to drive the pixels in a driving method that includes a first period during which the gate electrode of the first transistor is initialized, a second period during which the first electrode of the emission element is initialized and the data voltage that compensates a threshold voltage of the first transistor is written, and a third period during which the emission element emits light.
14. The display device of claim 13 , wherein the second gate signal and the second emission control signal are activated and the first gate signal, the third gate signal, and the first emission control signal are inactivated in the first period.
15. The display device of claim 13 , wherein the first gate signal, the third gate signal, and the second emission control signal are activated, and the second gate signal and the first emission control signal are inactivated in the second period.
16. The display device of claim 13 , wherein the first emission control signal is activated, and the first gate signal, the second gate signal, the third gate signal, and the second emission control signal are inactivated during the third period.
17. The display device of claim 13 , wherein the driving method further includes a fourth period and a fifth period during which the fourth node is refreshed.
18. The display device of claim 17 , wherein the second gate signal is activated and the first gate signal, the third gate signal, the first emission control signal, and the second emission control signal are inactivated during the fourth period.
19. The display device of claim 17 , wherein the first gate signal and the third gate signal are activated, and the second gate signal, the first emission control signal, and the second emission control signal are inactivated during the fifth period.
20. The display device of claim 17 , wherein the driving method includes the third period, the fourth period, and the fifth period more than one time in a frame.