IP Library Granted Patent US 10,790,191
Granted Patent B2
US 10,790,191 · App. 16/403,946 · Granted Sep 29, 2020

Selective removal process to create high aspect ratio fully self-aligned via

Inventors: Amrita B. Mullick (Santa Clara, CA); Madhur Sachan (Belmont, CA); He Ren (San Jose, CA); Swaminathan Srinivasan (Pleasanton, CA); Regina Freed (Los Altos, CA); Uday Mitra (Cupertino, CA)
Assignee: MICROMATERIALS LLC
H01L21/76897H01L21/31111H01L21/7681H01L21/76813H01L21/76819H01L21/76877H01L23/5226
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Quick Facts
Patent No.
US 10,790,191
App. No.
16/403,946
Granted
Sep 29, 2020
Kind
B2
Abstract

Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure utilize a cap layer to protect an insulating layer in order to minimize bowing of the side walls during metal recess in a fully self-aligned via. The cap layer can be selectively removed, thus increasing the aspect ratio, by exposing the substrate to a hot phosphoric acid solution.

Claims (38)

1. A method to provide a self-aligned via, the method comprising:

providing a substrate having a first insulating layer thereon, the first insulating layer having a top surface with trenches formed along a first direction;

forming a cap layer on the top surface of the first insulating layer;

providing recessed first conductive lines in the trenches of the first insulating layer, the recessed first conductive lines extending along the first direction and having a first conductive surface below the top surface of the first insulating layer;

forming a first metal film on the recessed first conductive lines;

forming pillars from the first metal film on the recessed first conductive lines, the pillars extending orthogonal to the top surface of the first insulating layer;

selectively removing at least a portion of the cap layer to expose the top surface of the first insulating layer;

depositing a second insulating layer around the pillars and on the top surface of the first insulating layer;

selectively removing at least one of the pillars to form at least one opening in the second insulating layer;

depositing a third insulating layer in the at least one opening onto the recessed first conductive lines to form filled vias;

etching a portion of the third insulating layer relative to the second insulating layer to form a via opening to at least one of the recessed first conductive lines; and

forming second conductive lines on portions of the second insulating layer and the third insulating layer, the second conductive lines extending along a second direction that crosses the first direction at an angle.

2. The method of claim 1 , wherein selectively removing at least a portion of the cap layer comprises exposing the substrate to a solution of hot phosphoric acid.

3. The method of claim 2 , wherein the entirety of the cap layer is removed.

4. The method of claim 1 , further comprising depositing an etch stop layer between the cap layer and the first insulating layer.

5. The method of claim 4 , wherein the etch stop layer is selected from aluminum oxide (Al 2 O 3 ), hafnium dioxide (HfO 2 ), and combinations thereof.

6. The method of claim 1 , wherein the recessed first conductive lines and second conductive lines independently comprise one or more of copper, ruthenium, nickel, cobalt, chromium, iron, manganese, titanium, aluminum, hafnium, tantalum, tungsten, vanadium, molybdenum, palladium, gold, silver, platinum, indium, tin, lead, antimony, bismuth, zinc, or cadmium.

7. The method of claim 6 , wherein the recessed first conductive lines and the second conductive lines independently comprise one or more of copper or cobalt.

8. The method of claim 1 , wherein the cap layer comprises one or more of silicon nitride, silicon oxide, silicon oxynitride, and silicon carbonitride.

9. The method of claim 1 , wherein the first metal film comprises tungsten and wherein the pillars are formed by oxidizing the first metal film to form tungsten oxide.

10. The method of claim 1 , wherein the recessed first conductive lines have a width in a range of about 2 nm to about 15 nm.

11. The method of claim 1 , wherein the first insulating layer, the second insulating layer, and the third insulating layer are independently selected from: oxides, carbon doped oxides, porous silicon dioxide, carbides, oxycarbides, nitrides, oxynitrides, oxycarbonitrides, polymers, phosphosilicate glass, fluorosilicate (SiOF) glass, organosilicate glass (SiOCH), or any combinations thereof.

12. The method of claim 1 , wherein the first insulating layer and the second insulating layer are comprised of the same material.

13. The method of claim 1 , wherein the recessed first conductive lines are recessed in a range of about 10 nm to about 50 nm.

14. The method of claim 1 , wherein the pillars are removed by etching with a solution of HF and HNO 3 , a solution of NH 4 OH and H 2 O 2 , WCl 5 , WF 6 .

15. A method to provide a self-aligned via, the method comprising:

providing a substrate having a first insulating layer thereon, the first insulating layer having a top surface with trenches formed along a first direction;

forming a cap layer on the top surface of the first insulating layer, the cap layer comprising one or more of silicon nitride, silicon oxide, silicon oxynitride, and silicon carbonitride;

providing recessed first conductive lines in the trenches of the first insulating layer, the recessed first conductive lines extending along the first direction and having a first conductive surface below the top surface of the first insulating layer, the recessed first conductive lines comprising one or more of copper or cobalt;

forming a first metal film on the recessed first conductive lines, the first metal film comprising tungsten;

forming pillars from the first metal film on the recessed first conductive lines, the pillars extending orthogonal to the top surface of the first insulating layer;

selectively removing at least a portion of the cap layer to expose the top surface of the first insulating layer by exposing the substrate to a solution of hot phosphoric acid;

depositing a second insulating layer around the pillars and on the top surface of the first insulating layer, the second insulating layer comprising a flowable silicon oxide;

planarizing the second insulating layer to expose tops of the pillars;

selectively removing at least one of the pillars to form at least one opening in the second insulating layer;

depositing a third insulating layer in the at least one opening onto the recessed first conductive lines to form filled vias, the third insulating layer comprising a flowable silicon oxide;

etching a portion of the third insulating layer relative to the second insulating layer to form a via opening to at least one of the recessed first conductive lines; and

forming second conductive lines on portions of the second insulating layer and the third insulating layer, the second conductive lines extending along a second direction that crosses the first direction at an angle, the second conductive lines comprising one or more of copper or cobalt.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2019
From: MULLICK, AMRITA B.; SACHAN, MADHUR; REN, HE; SRINIVASAN, SWAMINATHAN; FREED, REGINA; MITRA, UDAY
To: MICROMATERIALS LLC
Reel/Frame 050485/0050 →
Continuity (2)
Provisional Application 62668406 · May 8, 2018
Related Publication 20190348322A1 · Nov 14, 2019