Pixel circuit

1. A pixel circuit, comprising:

a front-end circuit, arranged to generate pixel signals, wherein the pixel signals comprise a photodiode signal and a reference signal;

a signal storage circuit, coupled to the front-end circuit, arranged to store the photodiode signal and the reference signal generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the photodiode signal and the reference signal stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage; and

an output circuit, coupled to the signal storage circuit, wherein when the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

2. The pixel circuit of claim 1 , wherein the signal storage circuit comprises:

a first transistor, coupled between the front-end circuit and a first floating diffusion (FD) node, wherein a gate terminal of the first transistor is coupled to a first control signal;

a second transistor, coupled between the first FD node and a second FD node, wherein a gate terminal of the second transistor is coupled to a second control signal;

a first capacitor, coupled between the first FD node and the control voltage; and

a second capacitor, coupled between the second FD node and the control voltage;

wherein the first FD node and the second FD node are arranged to store the photodiode signal and the reference signal, respectively.

3. The pixel circuit of claim 1 , wherein the output circuit comprises:

a first transistor, wherein a gate terminal and a drain terminal of the first transistor are coupled to the signal storage circuit and a first reference voltage, respectively; and

a second transistor, coupled between a source terminal of the first transistor and the output terminal, wherein a gate terminal of the second transistor is coupled to a control signal.

4. The pixel circuit of claim 3 , wherein the voltage increment is greater than a threshold voltage of the first transistor.

5. The pixel circuit of claim 1 , wherein the front-end circuit comprises:

a photodiode, arranged to accumulate charges in response to incident radiation, to generate the photodiode signal;

a first transistor, coupled between the photodiode and an ordinary FD node, wherein a gate terminal of the first transistor is coupled to a first control signal;

a second transistor, coupled between a first reference voltage and the ordinary FD node, wherein a gate terminal of the second transistor is coupled to a second control signal;

a third transistor, wherein a gate terminal, a drain terminal and a source terminal of the third transistor are coupled to the ordinary FD node, the first reference voltage and the signal storage circuit, respectively; and

a fourth transistor, coupled between the source terminal of the third transistor and a second reference voltage, wherein a gate terminal of the fourth transistor is coupled to a gate bias voltage.

6. The pixel circuit of claim 5 , wherein the voltage increment is greater than a threshold voltage of the third transistor.