IP Library Granted Patent US 10,797,657
Granted Patent B2
US 10,797,657 · App. 16/217,506 · Granted Oct 6, 2020

Matching network and power amplifier circuit

Inventors: Kiichiro Takenaka (Kyoto, JP); Masahiro Ito (Kyoto, JP); Tsuyoshi Sato (Kyoto, JP); Kozo Sato (Kyoto, JP); Hidetoshi Matsumoto (Kyoto, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H03F1/565H03F3/195H03F3/211H03F3/45085H03F3/45183H03H7/09H03H7/1758H03H7/38H03F2200/171H03F2200/222H03F2200/387H03F2200/451H03F2203/21103H03F2203/21139H03F2203/45172H03F2203/45576H03H7/0115
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Quick Facts
Patent No.
US 10,797,657
App. No.
16/217,506
Granted
Oct 6, 2020
Kind
B2
Abstract

A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.

Claims (47)

1. A matching network of a power amplifier circuit that receives, at an input node, a high-frequency signal and that outputs, to an output node, a signal obtained by amplifying a power of the high-frequency signal with a differential amplifier, the matching network comprising:

an input-side winding connected between differential outputs of the differential amplifier;

an output-side winding that is coupled to the input-side winding via an electromagnetic field, wherein a first end of the output-side winding is connected to a reference potential;

a first LC series resonant circuit connected in parallel with the input-side winding, the first LC series resonant circuit comprising a first capacitive element and a first inductive element connected in series with each other; and

a second LC series resonant circuit connected in parallel with the output-side winding, the second LC series resonant circuit comprising a second capacitive element and a second inductive element connected in series with each other.

2. The matching network according to claim 1 ,

wherein a resonant frequency of the first LC series resonant circuit is in a first frequency band comprising an odd harmonic of the high-frequency signal,

wherein a resonant frequency of the second LC series resonant circuit is in a second frequency band comprising another harmonic of the high-frequency signal, and

wherein the first frequency band and the second frequency band do not overlap.

3. The matching network according to claim 1 ,

wherein a resonant frequency of the first LC series resonant circuit is in a first frequency band comprising a third harmonic of the high-frequency signal, and

wherein a lower limit of the first frequency band is not less than 0.85 times a frequency of the third harmonic and an upper limit of the first frequency band is not more than 1.15 times the frequency of the third harmonic.

4. The matching network according to claim 1 ,

wherein a resonant frequency of the second LC series resonant circuit is in a second frequency band comprising a second harmonic of the high-frequency signal, and

wherein a lower limit of the second frequency band is not less than 0.85 times a frequency of the second harmonic and an upper limit of the second frequency band is not more than 1.15 times the frequency of the second harmonic.

5. The matching network according to claim 1 , further comprising:

an LC parallel resonant circuit between a second end of the output-side winding and the output node,

wherein the LC parallel resonant circuit comprises a capacitive element and an inductive element connected in parallel with each other.

6. The matching network according to claim 5 ,

wherein a resonant frequency of the LC parallel resonant circuit is in a third frequency band comprising an harmonic of the high-frequency signal, and

wherein a lower limit of the third frequency band is not less than 0.85 times a frequency of the harmonic and an upper limit of the third frequency band is not more than 1.15 times the frequency of the harmonic.

7. The matching network according to claim 5 ,

wherein a resonant frequency of the LC parallel resonant circuit is in a third frequency band comprising a third harmonic of the high-frequency signal,

wherein a lower limit of the third frequency band is not less than 0.85 times a frequency of the third harmonic and an upper limit of the third frequency band is not more than 1.15 times the third frequency of the harmonic.

8. The matching network according to claim 1 , further comprising:

an LC high pass filter circuit connected between the output node and the reference potential,

wherein the LC high pass filter comprises a capacitive element connected between a second end of the output-side winding and the output node, and an inductive element.

9. The matching network according to claim 8 , wherein the inductive element is connected between the output node and the reference potential.

10. The matching network according to claim 8 , wherein a cutoff frequency of the LC high pass filter circuit is in a frequency band lower than a fundamental of the high-frequency signal.

11. The matching network according to claim 1 , further comprising:

an LC low pass filter circuit connected between the output node and the reference potential,

wherein the LC low pass filter comprises an inductive element connected between a second end of the output-side winding and the output node, and a capacitive element.

12. The matching network according to claim 11 , wherein the capacitive element is connected between the output node and the reference potential.

13. The matching network according to claim 11 , wherein a cutoff frequency of the LC low pass filter circuit is in a frequency band higher than a fundamental of the high-frequency signal.

14. A power amplifier circuit comprising:

the matching network according to claim 1 .

15. The power amplifier circuit according to claim 14 , comprising a plurality of the differential amplifiers connected to each other via transformers to form multiple power amplification stages.

16. The power amplifier circuit according to claim 14 , wherein the differential amplifier and the matching network are mounted on a same semiconductor chip.

17. The matching network according to claim 2 , further comprising:

an LC parallel resonant circuit between a second end of the output-side winding and the output node,

wherein the LC parallel resonant circuit comprises a capacitive element and an inductive element connected in parallel with each other.

18. The matching network according to claim 3 , further comprising:

an LC parallel resonant circuit between a second end of the output-side winding and the output node,

wherein the LC parallel resonant circuit comprises a capacitive element and an inductive element connected in parallel with each other.

19. The matching network according to claim 4 , further comprising:

an LC parallel resonant circuit between a second end of the output-side winding and the output node,

wherein the LC parallel resonant circuit comprises a capacitive element and an inductive element connected in parallel with each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2018
From: TAKENAKA, KIICHIRO; ITO, MASAHIRO; SATO, TSUYOSHI; SATO, KOZO; MATSUMOTO, HIDETOSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 047755/0166 →
Priority Claims (1)
JP 2017-252513 · Dec 27, 2017 · national
Continuity (1)
Related Publication 20190199298A1 · Jun 27, 2019
Cited By (1)
US 12,483,209