Semiconductor device and manufacturing method of semiconductor device
According to one embodiment, a semiconductor device includes: a stack body including an insulator, a first conductor and a second conductor stacked stepwise by interposing the insulator and electrically disconnected from each other; and a first contact plug which reaches the first conductor from a region above the stack body. The first conductor includes a first portion positioned below the insulator, a second portion positioned above the insulator, and a third portion that electrically connects the first portion of the first conductor and the second portion of the first conductor. The third portion of the first conductor is provided in an opening formed on the insulator.
1. A semiconductor device comprising:
a stack body including an insulator, a first conductor and a second conductor stacked stepwise by interposing the insulator and electrically disconnected from each other; and
a first contact plug which reaches the first conductor from a region above the stack body;
wherein the first conductor includes a first portion positioned below the insulator, a second portion positioned above the insulator, and a third portion that electrically connects the first portion of the first conductor and the second portion of the first conductor,
the third portion of the first conductor is provided in an opening formed in the insulator,
the stack body includes a first area stacked stepwise along a first direction, and a second area stacked stepwise along a second direction intersecting the first direction, and a third conductor stacked stepwise to the first conductor interposing the insulator and electrically disconnected with the first conductor and the second conductor;
the device further comprising:
a second contact plug which reaches the second conductor in the first area from the region above the stack body; and
a third contact plug which reaches the third conductor in the second area from the region above the stack body.
2. The device of claim 1 , wherein the third portion of the first conductor is formed along a first step portion between the first conductor and the second conductor.
3. The device of claim 1 , further comprising:
an insulating spacer formed on a side surface of a first step portion between the first conductor and the second conductor.
4. The device of claim 3 , wherein the third portion of the first conductor is formed along the spacer.
5. The device of claim 1 , wherein an area of the insulator provided with the second portion of the first conductor on an upper surface is thinner than an area of the insulator provided with the second conductor on an upper surface.
6. The device of claim 1 , further comprising:
a semiconductor pillar passing through the stack body along a third direction which intersects with the first direction and the second direction;
a first charge storage portion provided between the semiconductor pillar and the first conductor; and
a second charge storage portion provided between the semiconductor pillar and the second conductor.
7. The device of claim 1 , further comprising:
a first memory cell transistor including a gate electrically connected to the first conductor; and
a second memory cell transistor including a gate electrically connected to the second conductor.
8. The device of claim 1 , wherein the second conductor is provided on an upper surface of the insulator, and
the third conductor is provided above the second conductor.
9. The device of claim 1 , wherein the third portion of the first conductor is formed along a first step portion between the first conductor and the second conductor, and a second step portion between the first conductor and the third conductor.
10. The device of claim 9 , wherein a step of the second step portion is larger than a step of the first step portion.