Method of forming stacked structure of memory
A method of forming a dielectric layer includes the following steps. A substrate including a first area and a second area is provided. A plurality of patterns on the substrate of the first area and a blanket stacked structure on the substrate of the second area are formed. An organic dielectric layer covers the patterns, the blanket stacked structure and the substrate. The blanket stacked structure is patterned by serving the organic dielectric layer as a hard mask layer, thereby forming a plurality of stacked structures. The organic dielectric layer is removed. A dielectric layer blanketly covers the patterns, the stacked structures, and the substrate.
1. A method of forming stacked structures of a memory, comprising:
providing a substrate comprising a first area and a second area;
forming a plurality of patterns on the first area of the substrate and a blanket stacked structure on the second area of the substrate;
forming an organic dielectric layer covering the patterns, the blanket stacked structure and the substrate;
patterning the blanket stacked structure by serving the organic dielectric layer as a hard mask layer, thereby forming a plurality of stacked structures;
removing the organic dielectric layer completely after the blanket stacked structure is patterned; and
forming a dielectric layer blanketly covering the patterns, the stacked structures, and the substrate.
2. The method of forming the stacked structures of the memory according to claim 1 , wherein gaps between the stacked structures in the second area are less than gaps between the patterns in the first area.
3. The method of forming the stacked structures of the memory according to claim 2 , wherein the first area comprises a logic area while the second area comprises a dynamic random access memory area.
4. The method of forming the stacked structures of the memory according to claim 3 , wherein the patterns comprise gates, and the stacked structures comprise bit line gates.
5. The method of forming the stacked structures of the memory according to claim 1 , further comprising:
sequentially forming a silicon-containing hard mask bottom anti-reflective coating layer and a photoresist layer on the organic dielectric layer after the organic dielectric layer covering the patterns, the blanket stacked structure and the substrate is formed, and the blanket stacked structure is patterned by sequentially transferring patterns of the photoresist layer, the silicon-containing hard mask bottom anti-reflective coating layer and the organic dielectric layer.
6. The method of forming the stacked structures of the memory according to claim 1 , wherein the organic dielectric layer is removed by an O2 stripping process.
7. The method of forming the stacked structures of the memory according to claim 1 , further comprising:
forming first spacers on sidewalls of the patterns and the blanket stacked structure before the organic dielectric layer covering the patterns, the blanket stacked structure and the substrate is formed.
8. The method of forming the stacked structures of the memory according to claim 7 , further comprising:
forming lightly doped sources/drains in the substrate beside the first spacers on the sidewalls of the patterns.
9. The method of forming the stacked structures of the memory according to claim 7 , further comprising:
forming second spacers on the sidewalls of the patterns and the blanket stacked structure after the first spacers are formed.
10. The method of forming the stacked structures of the memory according to claim 9 , further comprising:
forming sources/drains in the substrate beside the second spacers on the sidewalls of the patterns.
11. The method of forming the stacked structures of the memory according to claim 1 , further comprising:
forming third spacers on sidewalls of the patterns and the stacked structures after the organic dielectric layer is removed.
12. The method of forming the stacked structures of the memory according to claim 11 , further comprising:
forming lightly doped sources/drains in the substrate beside the third spacers on the sidewalls of the stacked structures.
13. The method of forming the stacked structures of the memory according to claim 11 , further comprising:
forming fourth spacers on the sidewalls of the patterns and the stacked structures after the third spacers are formed.
14. The method of forming the stacked structures of the memory according to claim 13 , further comprising:
forming sources/drains in the substrate beside the fourth spacers on the sidewalls of the stacked structures.
15. The method of forming the stacked structures of the memory according to claim 1 , further comprising:
performing a curing process on the dielectric layer, and then performing a polishing process on the dielectric layer.