Pixel driving circuit and method for driving the same, pixel unit and display panel

1. A pixel driving circuit, comprising:

a driving sub-circuit, configured to generate driving current based on a data signal and a first voltage;

a first light-emitting control sub-circuit configured to receive a first control signal and the first voltage, and provide the first voltage to the driving sub-circuit under control of the first control signal;

a second light-emitting control sub-circuit configured to receive a second control signal and provide driving current generated by the driving sub-circuit to an output terminal of the pixel driving circuit under control of the second control signal;

a driving control sub-circuit configured to receive the second control signal and the data signal and provide the data signal to the driving sub-circuit under control of the second control signal; and

a reset sub-circuit configured to receive a reset signal and a second voltage, and reset the driving sub-circuit using the second voltage under control of the reset signal.

2. The pixel driving circuit according to claim 1 , wherein the driving sub-circuit comprises a driving transistor, a first transistor, and a storage capacitor, wherein

the driving transistor has a gate connected to the storage capacitor at a second node, a first electrode connected to the first light-emitting control sub-circuit and the driving control sub-circuit at a first node, and a second electrode connected to the second light-emitting control sub-circuit and the reset sub-circuit at a third node,

the first transistor has a gate connected to receive the first control signal, a first electrode connected to the second node, and a second electrode connected to the third node; and

the storage capacitor has a first terminal connected to a first voltage line for providing the first voltage, and a second terminal connected to the second node.

3. The pixel driving circuit according to claim 2 , wherein the first transistor is an N-type transistor, and the driving transistor is a P-type transistor.

4. The pixel driving circuit according to claim 2 , wherein the first light-emitting control sub-circuit comprises a second transistor having a gate connected to receive the first control signal, a first electrode connected to the first voltage line, and a second electrode connected to the first node.

5. The pixel driving circuit according to claim 4 , wherein the second transistor is a P-type transistor.

6. The pixel driving circuit according to claim 4 , wherein the second light-emitting control sub-circuit comprises a third transistor having a gate connected to receive the second control signal, a first electrode connected to the third node, and a second electrode connected to the output terminal.

7. The pixel driving circuit according to claim 6 , wherein the third transistor is an N-type transistor.

8. The pixel driving circuit according to claim 6 , wherein the driving control sub-circuit comprises a fourth transistor having a gate connected to receive the second control signal, a first electrode connected to a data signal terminal for providing the data signal, and a second electrode connected to the first node.

9. The pixel driving circuit according to claim 8 , wherein the fourth transistor is a P-type transistor.

10. The pixel driving circuit according to claim 8 , wherein the reset sub-circuit comprises a fifth transistor having a gate connected to receive the reset signal, a first electrode connected to a second voltage line for providing the second voltage, and a second electrode connected to the third node.

11. The pixel driving circuit according to claim 10 , wherein the fifth transistor is a P-type transistor.

12. The pixel driving circuit according to claim 8 , wherein the reset sub-circuit comprises a fifth transistor having a gate connected to receive the reset signal, a first electrode connected to a second voltage line for providing the second voltage, and a second electrode connected to the second node.

13. The pixel driving circuit according to claim 12 , wherein the fifth transistor is a P-type transistor.

14. A pixel unit, comprising:

the pixel driving circuit according to claim 1 ; and

a light-emitting element having an input terminal connected to the output terminal of the pixel driving circuit.

15. A display panel, comprising a plurality of pixel units according to claim 13 .

16. The display panel according to claim 15 , wherein the plurality of pixel units are arranged in an array, the display panel further comprising:

a plurality of scanning lines, wherein each of the plurality of scanning lines is connected to a respective row of pixel units in the array to provide the second control signal to the row of pixel units;

a plurality of data lines, wherein each of the plurality of data lines is connected to a respective column of pixel units in the array to provide a data signal to the column of pixel units; and

a plurality of light-emitting control lines, wherein each of the plurality of light-emitting control lines is connected to a respective row of pixel units in the array to provide the first control signal to the row of pixel units.

17. The display panel according to claim 16 , wherein a reset signal received by an n th row of pixel units is provided by a scanning line connected to an (n−1) th row of pixel units, wherein n is an integer and 2≤n≤N, and N represents a number of rows of pixel units in the array.

18. A method for driving a pixel driving circuit, wherein the pixel driving circuit comprises:

a driving sub-circuit, configured to generate driving current based on a data signal and a first voltage;

a first light-emitting control sub-circuit configured to receive a first control signal and the first voltage, and provide the first voltage to the driving sub-circuit under control of the first control signal;

a second light-emitting control sub-circuit configured to receive a second control signal and provide driving current generated by the driving sub-circuit to an output terminal of the pixel driving circuit under control of the second control signal;

a driving control sub-circuit configured to receive the second control signal and the data signal and provide the data signal to the driving sub-circuit under control of the second control signal; and

a reset sub-circuit configured to receive a reset signal and a second voltage, and reset the driving sub-circuit using the second voltage under control of the reset signal,

the method comprising:

providing, in a first period, the reset signal at a second level to the pixel driving circuit, so that the reset sub-circuit of the pixel driving circuit resets the driving sub-circuit;

providing, in a second period, the second control signal at the second level to the pixel driving circuit, so that the driving control sub-circuit of the pixel driving circuit provides a received data signal to the driving sub-circuit; and

providing, in a third period, the first control signal at the second level and the second control signal at a first level to the pixel driving circuit, so that the first light-emitting control sub-circuit of the pixel driving circuit provides a received first voltage to the driving sub-circuit of the pixel driving circuit, the driving sub-circuit generates driving current based on the data signal and the first voltage, and the second light-emitting control sub-circuit of the pixel driving circuit provides the driving current generated by the driving sub-circuit to the output terminal of the pixel driving circuit.

19. The method according to claim 18 , wherein the driving sub-circuit comprises a driving transistor, a first transistor, and a storage capacitor, wherein the first light-emitting control sub-circuit comprises a second transistor, the second light-emitting control sub-circuit comprises a third transistor, the driving control sub-circuit comprises a fourth transistor, and the reset sub-circuit comprises a fifth transistor, wherein

in the first period, the first control signal and the second control signal having the first level are provided, and the reset signal having the second level is provided;

in the second period, the first control signal and the reset signal having the first level are provided, and the second control signal having the second level is provided; and

in the third period, the second control signal and the reset signal having the first level are provided, and the first control signal having the second level is provided.

20. The method according to claim 19 , wherein the first transistor and the third transistor are N-type transistors, the driving transistor, the second transistor, the fourth transistor, and the fifth transistor are P-type transistors, the first level is a high level and the second level is a low level.