Solid-state imaging device and imaging system
A photoelectric conversion unit includes first, second, and third semiconductor regions having first, second, and first conductivity types, respectively. A fourth semiconductor region between the first and third semiconductor regions at the same depth as the second semiconductor region. A charge holding portion includes a fifth semiconductor region of the first conductivity type. A transfer transistor has a region between the first and fifth semiconductor regions as a channel portion. A pixel isolation portion includes a sixth semiconductor region of the second conductivity type between the third semiconductor regions of adjacent pixels. A relationship V6>V5>V4 is satisfied, where a potential of the fourth semiconductor region to charges is V4, a potential of a region having the highest potential to charges in the channel portion with the transfer transistor being in an off-state is V5, and a potential of the sixth semiconductor region to charges is V6.
1. A solid-state imaging device comprising:
a plurality of pixels each including a photoelectric conversion unit that generates charges by photoelectric conversion, a charge holding portion that holds charges transferred from the photoelectric conversion unit, and a transfer transistor; and
a pixel isolation portion provided between each of the plurality of pixels,
wherein the photoelectric conversion unit includes a first semiconductor region of a first conductivity type provided in a semiconductor substrate and configured to accumulate generated charges, a second semiconductor region of a second conductivity type provided under the first semiconductor region, and a third semiconductor region of the first conductivity type provided under the second semiconductor region and having a lower impurity concentration than the first semiconductor region, and the first semiconductor region is electrically connected to the third semiconductor region via a fourth semiconductor region provided at the same depth as the second semiconductor region,
wherein the charge holding portion includes a fifth semiconductor region of the first conductivity type,
wherein the transfer transistor has a region between the first semiconductor region and the fifth semiconductor region as a channel portion,
wherein the pixel isolation portion includes a sixth semiconductor region of the second conductivity type provided between the third semiconductor region of one of the plurality of pixels and the third semiconductor region of a pixel adjacent to the one of the plurality of pixels, and
wherein a relationship of V6>V5>V4 is satisfied, where a potential of the fourth semiconductor region to the charges is V4, a potential of a region having the highest potential to the charges in the channel portion with the transfer transistor being in an off-state is V5, and a potential of the sixth semiconductor region to the charges is V6.
2. The solid-state imaging device according to claim 1 ,
wherein the pixel isolation portion further includes a seventh semiconductor region of the second conductivity type provided between the first semiconductor region of one of the plurality of pixels and the first semiconductor region of a pixel adjacent to the one of the plurality of pixels, and
wherein a relationship of V7>V5 is satisfied, where a potential of the seventh semiconductor region to the charges is V7.
3. The solid-state imaging device according to claim 1 ,
wherein each of the plurality of pixels further includes an eighth semiconductor region of the second conductivity type provided under the third semiconductor region, and
wherein a relationship of V8>V5 is satisfied, where a potential of the eighth semiconductor region to the charges is V8.
4. The solid-state imaging device according to claim 2 ,
wherein each of the plurality of pixels further includes an eighth semiconductor region of the second conductivity type provided under the third semiconductor region, and
wherein a relationship of V8>V5 is satisfied, where a potential of the eighth semiconductor region to the charges is V8.
5. The solid-state imaging device according to claim 1 , wherein a potential between the first semiconductor region and the fifth semiconductor region is defined by a distance between the first semiconductor region and the fifth semiconductor region.
6. The solid-state imaging device according to claim 1 further comprising a ninth semiconductor region of the second conductivity type provided between the first semiconductor region and the fifth semiconductor region,
wherein a potential between the first semiconductor region and the fifth semiconductor region is defined by an impurity concentration of the ninth semiconductor region.
7. The solid-state imaging device according to claim 2 further comprising a ninth semiconductor region of the second conductivity type provided between the first semiconductor region and the fifth semiconductor region,
wherein a potential between the first semiconductor region and the fifth semiconductor region is defined by an impurity concentration of the ninth semiconductor region.
8. The solid-state imaging device according to claim 1 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
9. The solid-state imaging device according to claim 2 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
10. The solid-state imaging device according to claim 3 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
11. The solid-state imaging device according to claim 4 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
12. The solid-state imaging device according to claim 5 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
13. The solid-state imaging device according to claim 6 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
14. The solid-state imaging device according to claim 7 , wherein the fourth semiconductor region overlaps with at least a part of the first semiconductor region in a plan view.
15. The solid-state imaging device according to claim 1 , wherein the fourth semiconductor region is arranged in the center of the first semiconductor region in a plan view.
16. The solid-state imaging device according to claim 1 , wherein the photoelectric conversion unit further includes a tenth semiconductor region of the second conductivity type provided on a surface portion of the semiconductor substrate and forming a p-n junction between the photoelectric conversion unit and the first semiconductor region.
17. The solid-state imaging device according to claim 1 , wherein the fourth semiconductor region is a semiconductor region of the first conductivity type.
18. The solid-state imaging device according to claim 1 , wherein the fourth semiconductor region is a semiconductor region of the second conductivity type.
19. An imaging system comprising:
the solid-state imaging device according to claim 1 ; and
a signal processing unit that processes a signal output from each of the plurality of pixels of the solid-state imaging device.
20. A movable object comprising:
the solid-state imaging device according to claim 1 ;
a distance information acquisition unit that acquires distance information on a distance to an object, from a parallax image based on signals from the solid-state imaging device; and
a control unit that controls the movable object based on the distance information.