IP Library › Granted Patent US 10,833,164
Granted Patent B2
US 10,833,164 · App. 16/266,301 · Granted Nov 10, 2020

LDMOS transistors and associated systems and methods

Inventors: John Xia (Fremont, CA); Marco A. Zuniga (Berkeley, CA); Badredin Fatemizadeh (Palo Alto, CA); Vijay Parthasarathy (Sunnyvale, CA)
Assignee: Maxim Integrated Products, Inc.
H01L29/4916H01L29/0649H01L29/0653H01L29/0865H01L29/0882H01L29/1037H01L29/1095H01L29/404H01L29/407H01L29/4175H01L29/41766H01L29/4236H01L29/42368H01L29/51H01L29/7816H01L29/7825H01L29/7831H01L29/063H01L29/402H01L29/66484H01L29/66681H01L29/66704
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Quick Facts
Patent No.
US 10,833,164
App. No.
16/266,301
Granted
Nov 10, 2020
Kind
B2
Abstract

A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor includes a silicon semiconductor structure, a dielectric layer at least partially disposed in a trench of the silicon semiconductor structure in a thickness direction, and a gate conductor embedded in the dielectric layer and extending into the trench in the thickness direction. The dielectric layer and the gate conductor are at least substantially symmetric with respect to a center axis of the trench extending in the thickness direction, as seen when the LDMOS transistor is viewed cross-sectionally in a direction orthogonal to the lateral and thickness directions.

Claims (44)

1. A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor, comprising:

a silicon semiconductor structure, including a source region and a drain region separated from each other in a lateral direction, the source region including a source n+ region formed in a p-body, and the drain region including a drain n+ region; and

a gate structure formed at least partially in a trench of the silicon semiconductor structure between the source region and the drain region in the lateral direction, the gate structure being at least substantially symmetrical, as seen when the LDMOS transistor is viewed cross-sectionally in a direction orthogonal to the lateral direction, the gate structure including:

a dielectric layer at least partially disposed in the trench in a thickness direction, the thickness direction being orthogonal to the lateral direction, and

a gate conductor embedded in the dielectric layer and extending into the trench in the thickness direction,

wherein the p-body borders the trench in the lateral direction.

2. The LDMOS transistor of claim 1 , further comprising a first spacer and a second spacer bounding the gate structure on a first outer surface of the silicon semiconductor structure, the trench extending into the silicon semiconductor structure in the thickness direction from the first outer surface of the silicon semiconductor structure.

3. The LDMOS transistor of claim 2 , wherein the first spacer and the second spacer are separated from each other in the lateral direction.

4. The LDMOS transistor of claim 1 , wherein the dielectric layer separates the gate conductor from the silicon semiconductor structure.

5. The LDMOS transistor of claim 1 , wherein:

the source region and the drain region are formed in an n-well of the silicon semiconductor structure; and

the source n+ region is separated from the n-well at least partially by the p-body.

6. The LDMOS transistor of claim 1 , further comprising:

a source electrode contacting at least the source n+ region;

a gate electrode contacting the gate conductor; and

a drain electrode contacting the drain n+ region.

7. The LDMOS transistor of claim 1 , the gate conductor being formed of polysilicon, and the dielectric layer being formed of silicon dioxide.

8. A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor, comprising:

a silicon semiconductor structure, including a source region and a drain region separated from each other in a lateral direction;

a gate structure formed at least partially in a trench of the silicon semiconductor structure between the source region and the drain region in the lateral direction, wherein:

the gate structure includes a dielectric layer and a gate conductor, the dielectric layer being at least partially disposed in the trench in a thickness direction, the thickness direction being orthogonal to the lateral direction, and the gate conductor being embedded in the dielectric layer and extending into the trench in the thickness direction, and

a portion of the gate conductor extends above the silicon semiconductor structure and forms a u-shape that is at least substantially symmetrical, as seen when the LDMOS transistor is viewed cross-sectionally in a direction orthogonal to the lateral direction; and

a first spacer and a second spacer bounding the gate structure on a first outer surface of the silicon semiconductor structure, the trench extending into the silicon semiconductor structure in the thickness direction from the first outer surface of the silicon semiconductor structure.

9. The LDMOS transistor of claim 8 , wherein the first spacer and the second spacer are separated from each other in the lateral direction.

10. The LDMOS transistor of claim 8 , wherein the dielectric layer separates the gate conductor from the silicon semiconductor structure.

11. The LDMOS transistor of claim 8 , wherein:

the source region comprises a source n+ region formed in a p-body; and

the drain region comprises a drain n+ region.

12. The LDMOS transistor of claim 11 , wherein the p-body borders the trench in the lateral direction.

13. The LDMOS transistor of claim 12 , wherein:

the source region and the drain region are formed in an n-well of the silicon semiconductor structure; and

the source n+ region is separated from the n-well at least partially by the p-body.

14. The LDMOS transistor of claim 11 , further comprising:

a source electrode contacting at least the source n+ region;

a gate electrode contacting the gate conductor; and

a drain electrode contacting the drain n+ region.

15. The LDMOS transistor of claim 8 , the gate conductor being formed of polysilicon, and the dielectric layer being formed of silicon dioxide.

16. A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor, comprising:

a silicon semiconductor structure, including a source region and a drain region separated from each other in a lateral direction; and

a gate structure formed at least partially in a trench of the silicon semiconductor structure between the source region and the drain region in the lateral direction, the trench extending into the silicon semiconductor structure in a thickness direction from a first outer surface of the silicon semiconductor structure, the thickness direction being orthogonal to the lateral direction, the gate structure being at least substantially symmetrical, as seen when the LDMOS transistor is viewed cross-sectionally in a direction orthogonal to the lateral direction, the gate structure including:

a dielectric layer at least partially disposed in the trench in the thickness direction, and

a gate conductor embedded in the dielectric layer and extending into the trench in the thickness direction,

a first spacer and a second spacer bounding the gate structure on the first outer surface of the silicon semiconductor structure.

17. The LDMOS transistor of claim 16 , wherein the first spacer and the second spacer are separated from each other in the lateral direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2020
From: XIA, JOHN; ZUNIGA, MARCO A.; FATEMIZADEH, BADREDIN; PARTHASARATHY, VIJAY
To: MAXIM INTEGRATED PRODUCTS, INC.
Reel/Frame 052363/0285 →
Continuity (3)
Continuation 15602192 · May 23, 2017
Provisional Application 62340742 · May 24, 2016
Related Publication 20190181237A1 · Jun 13, 2019