Highly interleaved converter for reliable power processing
This specification discloses a novel power converter comprising a large array of interleaved converter channels. As a system, these channels provide high reliability through redundancy. The embodiments described herein solve a reliability and cost issues in converting electrical energy to alternating current (AC) power, with particular application to string inverters for solar power applications.
1. An electric power converter comprising:
a master controller and array of converter channels;
an interleaver circuit that time sequences a substantially evenly time-staggered clock waveform to each converter channel of the array of converter channels, each converter channel establishing a switching synchronized to the clock waveform;
an analog switch-control signal driven by master controller circuitry that is common to a plurality of converter channels of the array of converter channels; and
a feedback loop on each converter channel that compares a measured current against the analog switch-control signal to generate an offset Voltage waveform, that further comprises a circuit to sum said offset Voltage waveform on a substantially saw-tooth Voltage waveform, that further applies said sum to a thresholding circuit.
2. The electric power converter of claim 1 wherein the master controller produces the analog switch-control signal based on a comparison of a PWM-generated waveform and an output current-derived waveform.
3. The electric power converter of claim 1 wherein the thresholding circuit comprises a logic gate.
4. The electric power converter of claim 1 wherein the thresholding circuit comprises a comparator.
5. An electric power converter comprising:
a master controller and array of converter channels;
an interleaver circuit that time sequences a substantially evenly time-staggered clock waveform to at least a subset of the array of converter channels, each converter channel of the subset establishing a switching synchronized to the clock waveform;
an analog switch-control signal common to at least the subset of the array of converter channels, the analog switch-control signal being an output of an outer feedback analog circuit that is based on a difference between a microcontroller-generated target signal and a sensed actual signal; and
a feedback loop on each converter channel that compares a measured current against the analog switch-control signal to generate a control waveform, that further comprises a circuit to sum said control waveform on a substantially saw-tooth waveform, that further applies said sum to a thresholding circuit.
6. The electric power converter of claim 5 wherein the thresholding circuit comprises a logic gate.
7. The electric power converter of claim 5 wherein the thresholding circuit comprises a comparator.
8. The electric power converter of claim 5 wherein the subset of the array of converter channels includes only operational converter channels.
9. The electric power converter of claim 5 wherein the subset includes all converter channels of the array of converter channels.
10. The electric power converter of claim 5 wherein the subset of the array of converter channels is determined from bits of a digital register loaded from a serial digital pulse sequence.
11. The electric power converter of claim 5 wherein the master controller produces the analog switch-control signal based on a comparison of a PWM-generated waveform and an output current-derived waveform.
12. The electric power converter of claim 5 further comprising an analog switch configured to connect more than one sensed signal to a sensed input of the outer feedback analog circuit.