IP Library › Granted Patent US 10,840,238
Granted Patent B2
US 10,840,238 · App. 16/094,222 · Granted Nov 17, 2020

Semiconductor device

Inventors: Takafumi Arakawa (Kariya, JP); Shigeki Takahashi (Kariya, JP)
Assignee: DENSO CORPORATION
H01L27/0664H01L27/0727H01L29/0619H01L29/0623H01L29/0692H01L29/0696H01L29/1095H01L29/32H01L29/7397H01L29/78H01L29/8611
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,840,238
App. No.
16/094,222
Granted
Nov 17, 2020
Kind
B2
Abstract

A semiconductor device has a semiconductor substrate including an IGBT region operating as an IGBT provided by an emitter layer, a base layer, a drift layer and a collector layer, and a diode region operating as a diode and provided by an anode layer, the drift layer and a cathode layer. The semiconductor substrate further includes a guard ring of a second conduction type, provided in a surface layer of the drift layer in a peripheral region surrounding a device region where the IGBT region and the diode region are adjacent to each other. The cathode layer and the guard ring are positioned such as to satisfy L/d≥1.5, where L is a minimum value of a distance between the cathode layer and the guard ring as projected to a plane parallel to a surface of the semiconductor substrate, and d is a thickness of the semiconductor substrate.

Claims (30)

1. A semiconductor device, comprising a semiconductor substrate including:

a drift layer of a first conduction type;

a base layer and an anode layer of a second conduction type provided in a surface layer on one side of the drift layer;

an emitter layer selectively provided in the base layer; and

a collector layer of the second conduction type and a cathode layer of the first conduction type provided in a surface layer on the other side of the drift layer,

the emitter layer, the base layer, the drift layer, and the collector layer providing an IGBT region that operates as an IGBT, and the anode layer, the drift layer, and the cathode layer providing a diode region that operates as a diode adjacent to the IGBT region, wherein:

the semiconductor substrate further includes a guard ring of the second conduction type, the guard ring being provided in a surface layer of the drift layer in a peripheral region surrounding a device region where the IGBT region and the diode region are adjacent to each other, and the guard ring being applied with voltage having a same potential as the anode layer; and

the cathode layer and the guard ring are positioned such as to satisfy L/d≥1.5, where L is a minimum value of a distance between the cathode layer and the guard ring as projected to a plane parallel to a surface of the semiconductor substrate, and d is a thickness of the semiconductor substrate.

2. The semiconductor device according to claim 1 , wherein

a damaged region is provided in the drift layer at least included in the diode region,

the damaged region extends beyond the device region to reach the drift layer of the peripheral region, and

the cathode layer and part of the guard ring not covered by the damaged region are positioned such as to satisfy L/d≥1.5, where L is a minimum value of a distance between the cathode layer and the part of the guard ring not covered by the damaged region as projected to the plane parallel to the surface of the semiconductor substrate, and d is the thickness of the semiconductor substrate.

3. The semiconductor device according to claim 1 , wherein

the cathode layer and the guard ring are positioned such as to satisfy L/d≥1.8.

4. The semiconductor device according to claim 1 , wherein

the cathode layer and the guard ring are positioned such as to satisfy L/d≥2.0.

5. The semiconductor device according to claim 1 , wherein

the guard ring has a higher impurity concentration than the anode layer.

6. The semiconductor device according to claim 1 , wherein

the device region includes a plurality of the IGBT regions and the diode regions alternately aligned in striped array, and

the IGBT regions are positioned at both ends of the striped array of the device region.

7. The semiconductor device according to claim 1 , further comprising

an anode contact layer of the second conduction type provided in a surface portion of the anode layer, having a higher impurity concentration than an impurity concentration of the anode layer, and located directly above the cathode layer, wherein

the anode contact layer is separated from the guard ring.

8. The semiconductor device according to claim 7 , further comprising

a base contact layer of the second conduction type provided in a surface portion of the base layer, having a higher impurity concentration than an impurity concentration of the base layer, wherein

the base contact layer is separated from the guard ring.

9. The semiconductor device according to claim 1 , further comprising:

an anode contact layer of the second conduction type provided in a surface portion of the anode layer, having a higher impurity concentration than an impurity concentration of the anode layer, and located directly above the cathode layer; and

a base contact layer of the second conduction type provided in a surface portion of the base layer, and having a higher impurity concentration than an impurity concentration of the base layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2018
From: ARAKAWA, TAKAFUMI; TAKAHASHI, SHIGEKI
To: DENSO CORPORATION
Reel/Frame 047191/0503 →
Priority Claims (1)
JP 2016-118218 · Jun 14, 2016 · national
Continuity (1)
Related Publication 20190096878A1 · Mar 28, 2019