IP Library › Granted Patent US 10,841,355
Granted Patent B2
US 10,841,355 · App. 16/230,930 · Granted Nov 17, 2020

Methods and apparatus for streaming media conversion with reduced buffering memories

Inventors: Shoichiro Sengoku (Dublin, CA); Anup K. Sharma (Sunnyvale, CA); Andrew Kenneth John McMahon (San Carlos, CA)
Assignee: Apple Inc.
H04L65/605G06F13/1673G06F13/4291
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Quick Facts
Patent No.
US 10,841,355
App. No.
16/230,930
Granted
Nov 17, 2020
Kind
B2
Abstract

Methods and apparatus for converting streaming media between different formats. A bridging device for e.g., Camera Serial Interface (CSI) and DisplayPort is disclosed. Both the CSI and DisplayPort technologies use low power mode operation during blanking intervals of a video transmission. However, the CSI interface can wake up in a very short amount of time (e.g., ˜400 ns), but the DisplayPort interface takes significantly longer to perform link training (e.g., ˜1 ms). Various embodiments of the present disclosure use frame signaling trigger to start a wait time interval timer; the wait time interval can be used by the bridge device to wake up the DisplayPort interface ahead of the CSI2 D-PHY interface, thereby ensuring that both links are active at the same time. This “wake-up” technique can greatly reduce the size of buffering memories that are required.

Claims (43)

1. A method for converting streaming media between different formats, comprising:

determining a wait interval, the wait interval comprising a timing difference between a first signal in a first media format and a second signal in a second media format, the first signal corresponding to an end portion of an active period associated with at least a portion of the streaming media, the second signal corresponding to a start portion of the active portion;

starting a timer for the wait interval in response to detecting said end portion or said start portion;

initiating link training after the timer has expired; and

transferring content.

2. The method of claim 1 , wherein the wait interval is determined based on a time difference between a first video frame and an immediate predecessor video frame.

3. The method of claim 1 , wherein the wait interval is determined based on a time difference between a first video start frame signal and a second video start frame signal.

4. The method of claim 1 , wherein the wait interval is determined based on a time difference between a first video start frame signal and a second video end frame signal.

5. The method of claim 1 , wherein the wait interval is determined based on one or more parameters associated with a video frame configuration.

6. The method of claim 5 , wherein the one or more parameters comprises a frame rate.

7. The method of claim 5 , wherein the one or more parameters comprises a vertical blanking interval time.

8. The method of claim 1 , wherein the transferring the content further comprises:

receiving a first data stream into a memory buffer;

converting the first data stream into a second data stream; and

transmitting the second data stream.

9. A bridge apparatus, comprising:

a first interface configured to receive a first data stream having a first data format;

a second interface configured to transmit a second data stream having a second data format different than the first data format;

wherein the first interface has a first initialization time and the second interface has a second initialization time;

a processing logic comprising a conversion logic and a timing logic:

the conversion logic configured to convert the first data stream having the first data format into the second data stream having the second data format; and

the timing logic configured to initialize the first interface or the second interface based on a difference between the first initialization time and the second initialization time.

10. The bridge apparatus of claim 9 , wherein the first interface is a Camera Serial Interface 2 (CSI2)-compliant interface and the second interface is a DisplayPort-compliant interface.

11. The bridge apparatus of claim 9 , wherein the first interface is configured to receive an external clock signal; and

wherein the second interface comprises a clock recovery circuit.

12. The bridge apparatus of claim 11 , wherein the first initialization time is based on a settling time associated with the external clock signal.

13. The bridge apparatus of claim 11 , wherein the second initialization time is based on a clock recovery time and a symbol lock time associated with the clock recovery circuit.

14. The bridge apparatus of claim 9 , further comprising a memory buffer configured to store an amount of data; and

wherein the amount of data is based on a first data rate of the first data stream and the difference between the first initialization time and the second initialization time.

15. The bridge apparatus of claim 14 , wherein the timing logic is further configured to calculate the amount of data based on a frame configuration parameter.

16. The bridge apparatus of claim 9 , wherein the timing logic is further configured to measure a time that elapses between periodic frame timing signals; and

wherein the bridge apparatus further comprises a memory buffer configured to store an amount of data based on the time.

17. The bridge apparatus of claim 16 , wherein the timing logic measures the time that elapses between periodic frame timing signals in response to a frame configuration.

18. The bridge apparatus of claim 16 , wherein the timing logic measures the time that elapses between periodic frame timing signals in response to an initial power-up process.

19. A consumer device, comprising:

a memory component configured to store data;

bridge logic configured to receive a first data stream having a first data format and generate a second data stream having a second data format different than the first data format;

wherein an initialization period associated with receipt of the first data stream requires a different amount of time than an initialization period associated with generation of the second data stream; and

wherein the bridge logic consumes an amount of memory of the memory component based on a buffering time, the buffering time being configured to enable a temporal offset of the initialization period associated with the generation of the second data stream; and

a timing logic configured to adjust the amount of memory consumed.

20. The consumer device of claim 19 , wherein the consumer device further comprises:

a camera component configured to generate the first data stream according to a Camera Serial Interface 2 (CSI2) data format; and

an audio visual component configured to receive the second data stream according to a DisplayPort data format.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2018
From: SENGOKU, SHOICHIRO; SHARMA, ANUP K.; MCMAHON, ANDREW KENNETH JOHN
To: APPLE INC.
Reel/Frame 047869/0292 →
Continuity (2)
Provisional Application 62697945 · Jul 13, 2018
Related Publication 20200021633A1 · Jan 16, 2020
Cited By (1)
US 12,373,369