Non-symmetric body contacts for field-effect transistors
Field-effect transistor (FET) devices are described herein that include one or more body contacts implemented near source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. For example, body contacts can be implemented between S/G/D assemblies rather than on the ends of such assemblies. This can advantageously improve body contact influence on the S/G/D assemblies while maintaining a targeted size for the FET device.
1. A field-effect transistor (FET) comprising:
a first assembly of source, gate, and drain implemented on a first active region, the first assembly having a first width and a first length, the first assembly including a first plurality of gate fingers extending parallel to the first width from an inner portion of the FET to a first edge of the FET;
a second assembly of source, gate, and drain implemented on a second active region, the second assembly having a second width and a second length, such that the first width is greater than the second width and the first length is not equal to the second length, the second assembly including a second plurality of gate fingers extending parallel to the second width from the inner portion of the FET to a second edge of the FET, opposite the first edge;
a first connecting gate metal interconnecting the first plurality of gate fingers, the first connecting gate metal positioned at the inner portion of the FET and oriented perpendicular to each of the first plurality of gate fingers; and
a second connecting gate metal interconnecting the second plurality of gate fingers, the second connecting gate metal positioned at the inner portion of the FET and oriented parallel to the first connecting gate metal and perpendicular to each of the second plurality of gate fingers; and
a body contact implemented between the first connecting gate metal of the first assembly and the second connecting gate metal of the second assembly such that the body contact is at the inner portion of the FET and away from a center of the FET, such that application of a voltage on the body contact produces a voltage potential that influences operation of both the first assembly and the second assembly.
2. The FET of claim 1 wherein the FET includes a silicon-on-insulator (SOI) substrate.
3. The FET of claim 1 wherein the first active region of the assembly includes a plurality of conductive features in rows between the plurality of gate fingers to form alternating strips of source and drain.
4. The FET of claim 1 wherein the number of gate fingers of the first plurality of gate fingers is different from the number of gate fingers of the second plurality of gate fingers.
5. A radio-frequency (RF) module comprising:
a packaging substrate configured to receive a plurality of devices; and
a die mounted on the packaging substrate, the die including a field-effect transistor (FET) having a first assembly of source, gate, and drain implemented on a first active region, the first assembly having a first width and a first length, the first assembly including a first plurality of gate fingers extending parallel to the first width from an inner portion of the FET to a first peripheral portion of the FET, the die further including a second assembly of source, gate, and drain implemented on a second active region, the second assembly having a second width and a second length, such that the first width is greater than the second width and the first length is not equal to the second length, the second assembly including a second plurality of gate fingers extending parallel to the second width from the inner portion of the FET to a second peripheral portion of the FET, opposite the first peripheral portion, the die further including a first connecting gate metal interconnecting the first plurality of gate fingers, the first connecting gate metal positioned at the inner portion of the FET and oriented perpendicular to each of the first plurality of gate fingers, the die further including a second connecting gate metal interconnecting the second plurality of gate fingers, the second connecting gate metal positioned at the inner portion of the FET and oriented parallel to the first connecting gate metal and perpendicular to each of the second plurality of gate fingers, and the die further including a body contact implemented between the first connecting gate metal of the first assembly and the second connecting gate metal of the second assembly such that the body contact at the inner portion of the FET and is away from a center of the FET, such that application of a voltage on the body contact produces a voltage potential that influences operation of both the first assembly and the second assembly.
6. The RF module of claim 5 wherein the RF module is a switch module.
7. The RF module of claim 5 wherein the die is a silicon-on-insulator (SOI) die.