IP Library › Granted Patent US 10,847,577
Granted Patent B2
US 10,847,577 · App. 16/472,218 · Granted Nov 24, 2020

Memory and logic device-integrated soft electronic system

Inventors: Sung Yool Choi (Daejeon, KR); Byung Chui Jang (Daejeon, KR)
Assignee: Korea Advanced Institute of Science and Technology
H01L27/24G11C13/0007H01L45/1253H01L45/147H03K19/20
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Quick Facts
Patent No.
US 10,847,577
App. No.
16/472,218
Granted
Nov 24, 2020
Kind
B2
Abstract

Provided is a memory- and logic device-integrated soft electronic system, the memory- and logic device-integrated soft electronic system including: a substrate 100 ; a plurality of bar-shaped first electrodes 110 stacked on the substrate; a resistance-variable material layer 120 coated on the lower electrode; and a plurality of bar-shaped second electrodes 130 stacked on the resistance-variable material layer 120 , wherein the first electrode and the second electrode cross each other.

Claims (13)

1. A memory- and logic device-integrated soft electronic system, comprising:

a substrate;

a plurality of bar-type first electrodes stacked on the substrate;

a resistance-variable material layer coated on the plurality of bar-type first electrodes; and

a plurality of bar-shaped second electrodes stacked on the resistance-variable material layer,

wherein the first electrode and the second electrode cross each other,

wherein the resistance-variable material layer comprises a polymer-deposited insulating film, and

wherein the polymer comprises any one selected from a group consisting of poly(cyclosiloxane), poly(furfuryl methacrylate), poly(isobornyl acrylate), poly(1,3,5-trimethyl-1,3,5-trivinylcyclotrisiloxane), poly(ethylene glycol dimethacrylate) and graphene oxide.

2. The memory- and logic device-integrated soft electronic system according to claim 1 , wherein the resistance-variable material layer is coated on an entire surface of the first electrode, and the second electrode is provided on the resistance-variable material layer.

3. The memory- and logic device-integrated soft electronic system according to claim 1 , wherein the memory- and logic device-integrated soft electronic system configures a logic gate in accordance with the memristor-aided logic (MAGIC) method.

4. The memory- and logic device-integrated soft electronic system according to claim 3 , wherein the logic gate is NOT, NOR, OR, AND or NAND.

5. The memory- and logic device-integrated soft electronic system according to claim 1 , wherein the first electrode and the second electrode comprises one selected from Cu, Ni, Ti, Hf, Zr, ZN, W, Co, V, Al and Pt.

6. The memory- and logic device-integrated soft electronic system according to claim 1 , wherein the substrate has a flexible property.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2019
From: CHOI, SUNG YOOL; JANG, BYUNG CHUL
To: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Reel/Frame 050035/0400 →
Priority Claims (1)
KR 10-2016-0175646 · Dec 21, 2016 · national
Continuity (1)
Related Publication 20190355787A1 · Nov 21, 2019
Cited By (1)
US 12,272,402