IP Library Granted Patent US 10,847,627
Granted Patent B2
US 10,847,627 · App. 15/045,931 · Granted Nov 24, 2020

Semiconductor device having source field plate and method of manufacturing the same

Inventors: Naiqian Zhang (Kunshan, CN); Feihang Liu (Kunshan, CN); Xin Jin (Kunshan, CN); Yi Pei (Kunshan, CN); Xi Song (Kunshan, CN)
Assignee: DYNAX SEMICONDUCTOR, INC.
H01L29/407H01L29/402H01L29/66431H01L29/7786H01L29/2003
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Quick Facts
Patent No.
US 10,847,627
App. No.
15/045,931
Granted
Nov 24, 2020
Kind
B2
Abstract

A semiconductor device comprises: a substrate; a semiconductor layer formed on the substrate; a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode formed on the semiconductor layer; and a source field plate formed on the semiconductor layer. The source field plate sequentially comprises: a start portion electrically connected to the source electrode; a first intermediate portion spaced apart from the semiconductor layer with air therebetween; a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the semiconductor layer; and an end portion spaced apart from the semiconductor layer with air therebetween.

Claims (35)

1. A semiconductor device, comprising:

a substrate;

a semiconductor layer formed on the substrate;

a first dielectric layer formed on the semiconductor layer;

a second dielectric layer formed on the first dielectric layer and a groove formed in the second dielectric layer;

a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode formed on the semiconductor layer; and

an integrated source field plate formed on the semiconductor layer, in a direction from the source electrode to the drain electrode, the source field plate sequentially comprising:

a start portion electrically connected to the source electrode;

a first intermediate portion spaced apart from the second dielectric layer with air therebetween, the first intermediate portion being directly connected to the start portion;

a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the second dielectric layer, the second intermediate portion being directly connected to the first intermediate portion; and

an end portion spaced apart from the second dielectric layer and the drain electrode with air therebetween, the end portion being directly connected to the second intermediate portion,

wherein an orthographic projection of the second intermediate portion of the source field plate is located in the groove, other portions of the source field plate except the second intermediate portion are spaced from the second dielectric layer, and the second intermediate portion is in direct contact with the bottom surface of the groove.

2. The semiconductor device according to claim 1 , wherein the second intermediate portion of the source field plate is in direct contact with the second dielectric layer.

3. The semiconductor device according to claim 1 , wherein the groove is formed in a position corresponding to the second intermediate portion of the source field plate in the horizontal direction, and the end portion of the source field plate is in the air.

4. The semiconductor device according to claim 3 , further comprising a first dielectric layer formed on the semiconductor layer and a second dielectric layer formed on the first dielectric layer,

wherein the groove is formed in the second dielectric layer.

5. The semiconductor device according to claim 3 , wherein a side wall of the groove has a shape of any one of a linear surface, an inclined surface and a curved surface or combination thereof.

6. The semiconductor device according to claim 1 , wherein the source field plate comprises a plurality of start portions and a plurality of first intermediate portions, each of the plurality of start portions and each of the plurality of first intermediate portions form an integral part respectively, the plurality of the first intermediate portions branch off from a same second intermediate portion.

7. The semiconductor device according to claim 6 , wherein at least one of the first intermediate portions has a concave shape in a longitudinal direction of the source field plate.

8. The semiconductor device according to claim 1 , wherein the end portion of the source field plate has a length greater than about 0 μm and less than or equal to about 5 μm.

9. The semiconductor device according to claim 1 , wherein a maximum height difference between the source field plate and the semiconductor layer is in a range of about 0.5 μm to about 5 μm.

10. A method of manufacturing a semiconductor device, comprising:

forming a semiconductor layer on a prepared substrate;

forming a first dielectric layer on the semiconductor layer;

forming a second dielectric layer on the first dielectric layer;

forming a groove in the second dielectric layer;

forming a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode on the semiconductor layer; and

forming an integrated source field plate on the semiconductor layer, in a direction from the source electrode to the drain electrode, the source field plate sequentially comprising:

a start portion electrically connected to the source electrode;

a first intermediate portion spaced apart from the second dielectric layer with air therebetween, the first intermediate portion being directly connected to the start portion;

a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the second dielectric layer, the second intermediate portion being directly connected to the first intermediate portion; and

an end portion spaced apart from the second dielectric layer and the drain electrode with air therebetween, the end portion being directly connected to the second intermediate portion,

wherein an orthographic projection of the second intermediate portion of the source field plate is located in the groove, other portions of the source field plate except the second intermediate portion are spaced from the second dielectric layer, and the second intermediate portion is in direct contact with the bottom surface of the groove.

11. The method according to claim 10 , wherein the source field plate is formed using an air bridge metal process.

12. The method according to claim 11 , wherein the air bridge metal process comprises at least one of a metal electron beam evaporation process, a metal sputtering process and a metal plating process.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE SECOND ASSIGNORS NAME AND THE ASSIGNEES ADDRESS PREVIOUSLY RECORDED AT REEL: 037845 FRAME: 0270. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 20, 2020
From: ZHANG, NAIQIAN; LIU, FEIHANG; JIN, XIN; PEI, YI; SONG, XI
To: DYNAX SEMICONDUCTOR, INC.
Reel/Frame 054134/0256 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2016
From: ZHANG, NAIQIAN; LIU, FEIHUANG; JIN, XIN; PEI, YI; SONG, XI
To: DYNAX SEMICONDUCTOR, INC.
Reel/Frame 037845/0270 →
Priority Claims (1)
CN 2015 1 0363973 · Jun 26, 2015 · national
Continuity (1)
Related Publication 20160380062A1 · Dec 29, 2016