Image sensor with sidewall protection and method of making same
An image sensor includes a photodiode within a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a contact etch stop layer (CESL), a plurality of dielectric layers over the CESL and a plurality of metallization layers in the plurality of dielectric layers. At least one dielectric layer of the plurality of dielectric layers includes a low-k dielectric material. An opening is extended through the plurality of dielectric layers to expose a portion of the CESL above an active region of the photodiode. A cap layer is on sidewalls of the opening. The cap layer includes a dielectric material having a higher moisture resistance than the low-k dielectric material.
1. An image sensor comprising:
a photodiode within a semiconductor substrate;
an interconnect structure over the semiconductor substrate, the interconnect structure comprising:
a contact etch stop layer (CESL),
a plurality of dielectric layers over the CESL, wherein at least one dielectric layer of the plurality of dielectric layers comprises a low dielectric constant (low-k) dielectric material; and
a plurality of metallization layers in the plurality of dielectric layers;
an opening extending through the plurality of dielectric layers, the opening exposing a portion of the CESL above an active region of the photodiode; and
a cap layer on sidewalls of the opening, wherein the cap layer comprises a dielectric material having a higher moisture resistance than the low-k dielectric material.
2. The image sensor of claim 1 , wherein the cap layer comprises silicon nitride or silicon oxynitride.
3. The image sensor of claim 1 , wherein the interconnect structure further comprises a resist protective layer between the photodiode and the CESL.
4. The image sensor of claim 3 , wherein the resist protective layer comprises silicon dioxide.
5. The image sensor of claim 1 , wherein the interconnect structure further comprises:
a passivation layer over a topmost dielectric layer of the plurality of dielectric layers; and
a plurality of metal pads in the passivation layer,
wherein the opening extends though the passivation layer.
6. The image sensor of claim 5 , wherein the passivation layer comprises silicon nitride or silicon oxynitride.
7. The image sensor of claim 1 , wherein the photodiode comprises:
a first deep well of a first conductivity type extending from a surface of the semiconductor substrate into the semiconductor substrate;
a first heavily doped region of the first conductivity type within a top region of the first deep well;
a buried doped layer of a second conductivity extending beneath and in contact with the first deep well, the second conductivity type opposite to the first conductivity type;
a second deep well of the second conductivity type spaced from the first deep well and contacting a periphery of the buried doped layer;
a second heavily doped region of the second conductivity type within a top region of the second deep well; and
a third heavily doped region of the first conductivity type spaced from the second heavily doped region along the surface of the semiconductor substrate.
8. The image sensor of claim 7 , wherein the interconnect structure further comprises a plurality of contact plugs, the plurality of contact plugs comprises:
a first contact plug contacting the first heavily doped region;
a second contact plug contacting the second heavily doped region; and
a third contact plug contacting the third heavily doped region.
9. The image sensor of claim 7 , further comprising a plurality of isolation structures in the semiconductor substrate, wherein a first isolation structure of the plurality of isolation structures separates the second heavily doped region from the third heavily doped region.
10. An image sensor comprising:
a photodiode within a semiconductor substrate;
a gate stack over the photodiode, the gate stack comprising a gate dielectric and a gate electrode over the gate dielectric;
an interconnect structure over the semiconductor substrate, the interconnect structure comprising:
a contact etch stop layer (CESL); and
a plurality of dielectric layers over the CESL, wherein at least one dielectric layer of the plurality of dielectric layers comprises a low dielectric constant (low-k) dielectric material;
an opening extending through the plurality of dielectric layers, the CESL and the gate electrode, the opening exposing a portion of the gate dielectric above an active region of the photodiode; and
a cap layer present at least on sidewalls of the opening, wherein the cap layer comprises a dielectric material having a higher moisture resistance than the low-k dielectric material.
11. The image sensor of claim 10 , wherein the cap layer comprises silicon nitride or silicon oxynitride.
12. The image sensor of claim 10 , wherein the plurality of dielectric layers in the interconnect structure comprises an inter-layer (ILD) layer over the CESL, and an inter-metal (IMD) layer over the ILD layer.
13. The image sensor of claim 12 , wherein the ILD layer comprises a first low-k dielectric material.
14. The image sensor of claim 13 , wherein the IMD layer comprises a second low-k dielectric material that is the same as, or different from, the first low-k dielectric material.
15. The image sensor of claim 12 , wherein the interconnect structure further comprises a plurality of contact plugs in the ILD layer and the CESL, the plurality of contact plugs electrically coupled to the photodiode.
16. The image sensor of claim 15 , wherein the interconnect structure further comprises a plurality of metallization layers in the IMD layer, the plurality of metallization layer electrically coupled to the plurality of contact plugs.
17. The image sensor of claim 10 , wherein the cap layer is on the sidewalls of the opening and a topmost surface of the interconnect structure.
18. An image sensor comprising:
a photodiode within a semiconductor substrate;
an interconnect structure over the semiconductor substrate, the interconnect structure comprising:
a contact etch stop layer (CESL),
a plurality of dielectric layers over the CESL, wherein at least one dielectric layer of the plurality of dielectric layers comprises a low dielectric constant (low-k) dielectric material; and
a plurality of metallization layers in the plurality of dielectric layers;
an opening extending through at least a portion of the interconnect structure; and
a cap layer on sidewalls of the opening, wherein the cap layer comprises a dielectric material having a higher moisture resistance than the low-k dielectric material.
19. The image sensor of claim 18 , wherein a top surface of the CESL defines a bottom surface of the opening.
20. The image sensor of claim 18 , wherein the opening extends through an entirety of the interconnect structure.