System and method for efficient implementation of prime field arithmetic in ARM processors

1. A method for improving performance of a computer processor in performing Elliptic Curve Cryptography (ECC), the method providing for a reduced number of operations executed in the computer processor, the method comprising:

performing multi-precision multiplication in the computer processor for ECC implemented on multiple arithmetic layers,

wherein performing the multi-precision multiplication comprises:

obtaining a first operand for a product-scanning multiplication operation to be performed over at least a first column, a second column, and a third column;

obtaining a second operand for the product-scanning multiplication operation to be performed over at least the first column, the second column, and the third column;

computing a first intermediary multiplication result for the first column in accordance with the product-scanning multiplication operation and storing the computed first intermediary result;

computing a second intermediary multiplication result for the second column in accordance with the product-scanning multiplication operation and storing the computed second intermediary result;

accumulating the first and second intermediary multiplication results for the first and second columns; and

preserving a generated carry flag such that propagation of a generated carry value to the third column is delayed.

2. The method of claim 1 , further comprising:

performing an inner multiplication loop inside a multiplication algorithm to scan positions in a result; and

generating all digit multiplications that contribute to a fixed position.

3. The method of claim 2 , wherein:

each of the digit multiplications is a double-precision result that requires two registers; and

accumulating and preserving the generated carry flag require a third register.

4. The method of claim 1 , wherein the product-scanning comprises Comba.

5. The method of claim 1 , wherein the product-scanning comprises a hybrid of Schoolbook and Comba.

6. The method of claim 1 , wherein the multi-precision multiplication is performed utilizing an Unsigned Multiply Accumulate Accumulate Long (UMAAL) instruction.

7. The method of claim 1 , wherein the method is performed in an Advanced RISC Machine (ARM) architecture.

8. A method for performing secure communication between devices, the method comprising:

performing Elliptic Curve Cryptography (ECC) of data, the ECC implemented on multiple arithmetic layers to generate encrypted data; and

transmitting the encrypted data via a communication channel,

wherein performing the ECC comprises performing multi-precision multiplication, wherein performing the multi-precision multiplication comprises:

obtaining a first operand for a product-scanning multiplication operation to be performed over at least a first column, a second column, and a third column;

obtaining a second operand for the product-scanning multiplication operation to be performed over at least the first column, the second column, and the third column;

computing a first intermediary multiplication result for the first column in accordance with the product-scanning multiplication operation and storing the computed first intermediary result;

computing a second intermediary multiplication result for the second column and storing the computed second intermediary result;

accumulating the first and second intermediary multiplication results for the first and second columns; and

preserving a generated carry flag such that propagation of generated carry value to the third column is delayed.

9. The method of claim 8 , further comprising:

performing an inner multiplication loop inside a multiplication algorithm to scan positions in a result; and

generating all digit multiplications that contribute to a fixed position.

10. The method of claim 9 , wherein:

each of the digit multiplications is a double-precision result that requires two registers; and

accumulating and preserving the generated carry flag require a third register.

11. The method of claim 8 , wherein the product-scanning comprises Comba.

12. The method of claim 8 , wherein the product-scanning comprises a hybrid of Schoolbook and Comba.

13. The method of claim 8 , wherein the multi-precision multiplication is performed utilizing an Unsigned Multiply Accumulate Accumulate Long (UMAAL) instruction.

14. The method of claim 8 , wherein the method is performed in an Advanced RISC Machine (ARM) architecture.