Method of manufacturing a semiconductor device
A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.
1. A method of manufacturing a semiconductor device, the method comprising:
forming a metal gate over a semiconductor fin;
cutting the metal gate into a first metal gate and a second metal gate, wherein after the cutting the metal gate, an oxide is present on a sidewall of the first metal gate;
removing the oxide from the sidewall of the first metal gate; and
filling a region between the first metal gate and the second metal gate with a dielectric material, wherein the dielectric material is in physical contact with the sidewall of the first metal gate.
2. The method of claim 1 , further comprising removing a spacer from a second sidewall of the first metal gate after the removing the oxide from the sidewall, the removing the spacer creating a void.
3. The method of claim 2 , further comprising capping the void to form an air spacer.
4. The method of claim 1 , wherein the removing the oxide is performed at a temperature between 115° C. and 120° C.
5. The method of claim 4 , wherein the removing the oxide is performed at a pressure of between 1.5 Torr and 2 Torr.
6. The method of claim 1 , wherein the removing the oxide is performed at least in part with a mixture of hydrogen fluoride and ammonia.
7. The method of claim 1 , wherein the cutting the metal gate is performed at least in part with cyclic deposition and etch processes.
8. A method of manufacturing a semiconductor device, the method comprising:
removing a dummy gate between spacers over a semiconductor fin;
replacing the dummy gate with a gate stack;
removing a portion of the gate stack with a cyclical etching process to form an opening, the cyclical etching process leaving an oxide material along sidewalls of the opening;
removing the oxide material from along the sidewalls of the opening;
after the removing the oxide material, filling the opening with a dielectric material;
applying an etchant to the spacers and also to a portion of an interface between the dielectric material and the gate stack, wherein the etchant removes the spacers to form a void but does not interject between the dielectric material and the gate stack; and
capping the void to form an air spacer adjacent to the gate stack.
9. The method of claim 8 , further comprising after the filling the opening with the dielectric material, recessing an interlayer dielectric to form a recess.
10. The method of claim 9 , further comprising filling the recess with a second dielectric material.
11. The method of claim 8 , wherein each cycle of the cyclical etching process comprises:
depositing a liner material;
etching through the liner material; and
using the liner material as a mask to etch the gate stack.
12. The method of claim 8 , wherein the removing the oxide material is performed at a temperature between 115° C. and 120° C.
13. The method of claim 12 , wherein the removing the oxide material is performed at a pressure of between 1.5 Torr and 2 Torr.
14. The method of claim 13 , wherein the removing the oxide material is performed at least in part with a mixture of hydrogen fluoride and ammonia.
15. A method of manufacturing a semiconductor device, the method comprising:
patterning a hard mask layer to form an opening over a conductive gate over a semiconductor fin;
depositing a first liner in the opening;
etching a first bottom of the first liner to expose the conductive gate;
etching the conductive gate through the first liner;
depositing a second liner within the opening;
etching a second bottom of the second liner to expose the conductive gate;
etching the conductive gate through the second liner;
removing an oxide from a sidewall of the conductive gate after the etching the conductive gate through the second liner;
applying a dielectric material to the sidewall of the conductive gate after the removing the oxide;
after the applying the dielectric material to the sidewall, removing spacers from adjacent to the conductive gate to form a void around the conductive gate; and
capping the void to form air spacers around the conductive gate.
16. The method of claim 15 , wherein the removing the oxide from the sidewall is performed at least in part with a mixture of hydrogen fluoride and ammonia.
17. The method of claim 16 , wherein the removing the oxide further comprises an annealing process.
18. The method of claim 17 , wherein the annealing process is performed at a temperature of between 80° C. to 200° C.
19. The method of claim 18 , wherein the removing the oxide is performed at a pressure of between 1.5 Torr and 2 Torr.
20. The method of claim 15 , further comprising:
recessing an interlayer dielectric to form a recess; and
filling the recess with a dielectric material.