IP Library › Granted Patent US 10,861,794
Granted Patent B2
US 10,861,794 · App. 16/177,116 · Granted Dec 8, 2020

Low frequency electromagnetic interference shielding

Inventor: Pin Chuan Wang (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/552H01L24/32H01L2924/35121
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Quick Facts
Patent No.
US 10,861,794
App. No.
16/177,116
Granted
Dec 8, 2020
Kind
B2
Abstract

A semiconductor package device includes a substrate, an insulation layer disposed on the substrate, and a shielding layer. The shielding layer includes an adhesive layer and a base layer. The adhesive layer is disposed between the base layer and the insulation layer. The adhesive layer and the base layer include a filler including at least a resin. The shielding layer passes a peeling test class of at least 3B of a cross-cut method and the shielding effectiveness of the shielding layer is at least or equal to 30 dB.

Claims (27)

1. A semiconductor package device, comprising:

a substrate;

an insulation layer disposed on the substrate; and

a shielding layer disposed on the insulation layer, wherein the shielding layer includes a first conductive layer disposed on the insulation layer and a second conductive layer disposed on the first conductive layer, the first conductive layer and the second conductive layer including a filler consisting of at least a resin, wherein the shielding layer passes a peeling test class of at least 3B of a cross-cut method, and a shielding effectiveness of the shielding layer is at least or equal to 30 dB, and wherein a thickness of the first conductive layer is less than that of the second conductive layer.

2. The semiconductor package device of claim 1 , wherein a content of the resin within the first conductive layer is greater than that of the second conductive layer.

3. The semiconductor package device of claim 2 , wherein the content of the resin within the first conductive layer is about 3˜7%.

4. The semiconductor package device of claim 2 , wherein the content of the resin within the second conductive layer is about 0.1˜0.3%.

5. The semiconductor package device of claim 1 , wherein a size of the filler within the first conductive layer is greater than that within the second conductive layer.

6. The semiconductor package device of claim 1 , wherein a volume resistivity of the first conductive layer is greater than that of the second conductive layer.

7. The semiconductor package device of claim 6 , wherein the volume resistivity of the first conductive layer is about 2×10 −5 ˜5×10 −5 Ω·cm.

8. The semiconductor package device of claim 6 , wherein the volume resistivity of the second conductive layer is about 4.8×10 −6 Ω·cm.

9. The semiconductor package device of claim 1 , wherein the filler further consists of at least a metal particle, a size of the metal particle in the first conductive layer being greater than that in the second conductive layer.

10. The semiconductor package device of claim 1 , wherein the shielding effectiveness of the shielding layer is at least or equal to 30 dB under a frequency of 10 MHz.

11. The semiconductor package device of claim 1 , wherein the shielding layer passes the peeling test class of 5B of the cross-cut method.

12. A semiconductor package device, comprising:

a substrate;

an insulation layer disposed on the substrate; and

a first conductive layer disposed on the insulation layer, wherein the first conductive layer includes a first filler; and

a second conductive layer disposed on the first conductive layer, wherein the second conductive layer includes a second filler,

wherein a size of the first filler is greater than that of the second filler.

13. The semiconductor package device of claim 12 , wherein the first filler includes at least a first resin, and the second filler includes at least a second resin.

14. The semiconductor package device of claim 13 , wherein a content of the first resin within the first conductive layer is greater than that within the second resin of the second conductive layer.

15. The semiconductor package device of claim 12 , wherein a volume resistivity of the first conductive layer is greater than that of the second conductive layer.

16. The semiconductor package device of claim 12 , wherein the filler further consists of at least a metal particle, a size of the metal particle in the first conductive layer being greater than that in the second conductive layer.

17. The semiconductor package device of claim 14 , wherein the content of the first resin within the first conductive layer is about 3˜7%, and wherein the content of the second resin within the second conductive layer is about 0.1˜0.3%.

18. The semiconductor package device of claim 15 , wherein a volume resistivity of the first conductive layer is about 2×10 −5 ˜5×10 −5 Ω·cm, and wherein a volume resistivity of the second conductive layer is about 4.8×10 −6 Ω·cm.

19. The semiconductor package device of claim 12 , wherein a thickness of the first conductive layer is less than a thickness of the second conductive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2018
From: WANG, PIN CHUAN
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 047374/0752 →
Continuity (1)
Related Publication 20200135657A1 · Apr 30, 2020