IP Library › Granted Patent US 10,866,898
Granted Patent B2
US 10,866,898 · App. 16/227,737 · Granted Dec 15, 2020

Method and apparatus for migrating data between nonvolatile main memory and first or second caches

Inventor: Hui-Won Lee (Seoul, KR)
Assignee: SK hynix Inc.
G06F12/0862G06F12/10G06F3/0679G06F12/0804G06F12/0868G06F2212/1021G06F2212/602G06F2212/657
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Quick Facts
Patent No.
US 10,866,898
App. No.
16/227,737
Granted
Dec 15, 2020
Kind
B2
Abstract

A memory system includes a non-volatile memory including a main area and a first cache area; and a controller suitable for controlling the non-volatile memory and including a second cache area. The controller includes a read manager suitable for performing a migration operation of moving data stored in the main area into the first cache area based on a list storing a plurality of logical block addresses (LBAs) based on a read data access pattern.

Claims (36)

1. A memory system, comprising:

a non-volatile memory including a main area and a first cache area; and

a controller suitable for controlling the non-volatile memory and including a second cache area,

wherein the controller includes:

a read manager suitable for performing a migration operation of moving data stored in the main area into the first cache area or the second cache area based on a list storing a plurality of logical block addresses (LBAs) based on a read data access pattern,

wherein the read manager detects data storage spaces of the first cache area or the second cache area during an idle time or at a predetermined period, reads from the list one or more LBAs corresponding to the detected data storage spaces of the first cache area or the second cache area, and reads and copies data corresponding to the LBAs from the main area and migrates the data stored in the main area into the first cache area or the second cache area.

2. The memory system of claim 1 , wherein the list stores a plurality of LBAs arranged based on the frequency of performing a read operation (data read count), and updates the data read count at a set time.

3. The memory system of claim 1 , wherein the number of the LBAs is based on the number of pages that are stored in the first cache area or the second cache area.

4. The memory system of claim 1 , wherein data is stored in a multi-level cell in the main area, and data is stored in a single-level cell in the first cache area.

5. The memory system of claim 1 , wherein the read manager deletes the data stored in the main area after the migration operation is performed.

6. The memory system of claim 1 , wherein the read manager further includes

reading and copying the data stored in the first cache area and storing the data in the second cache area based on the list according to the read data access pattern.

7. The memory system of claim 6 , wherein the read manager detects the number of data storage spaces of the second cache area, and then reads from the list one or more LBAs corresponding to the detected number of the data storage spaces of the second cache area and reads and copies data corresponding to the LBAs from the first cache area and stores the data in the second cache area.

8. A method for operating a memory system including a non-volatile memory having a main area and a first cache area, and a controller controlling the non-volatile memory and having a second cache area, comprising:

reading a list that stores a plurality of logical block addresses (LBAs) based on a read data access pattern; and

performing a migration operation of moving data stored in the main area into the first cache area or the second cache area based on the list, wherein detecting data storage spaces of the first cache area or the second cache area during an idle time or at a predetermined period, reading from the list one or more LBAs corresponding to the detected data storage spaces of the first cache area or the second cache area, reading and copying data corresponding to the LBAs from the main area and migrating the data stored in the main area into the first cache area or the second cache area.

9. The method of claim 8 , wherein the list stores the plurality of LBAs arranged based on the frequency of performing a read operation (data read count), and updates the data read count at a set time.

10. The method of claim 9 , wherein the number of the LBAs is based on the number of pages that are stored in the first cache area or the second cache area.

11. The method of claim 8 , wherein data is stored in a multi-level cell in the main area, and data is stored in a single-level cell in the first cache area.

12. The method of claim 8 , further comprising:

storing the data stored in the first cache area into the second cache area based on the read list.

13. The method of claim 12 , the storing of the data stored in the first cache area into the second cache area based on the read list comprises:

detecting an idle time or at a predetermined period, detecting the number of the data storage spaces of the second cache area during the idle time or at the predetermined period, reading from the list one or more LBAs corresponding to the detected number of the data storage spaces of the second cache area, reading data corresponding to the LBAs from the first cache area, and storing the read data into the second cache area.

14. A memory system, comprising:

a non-volatile memory including a main area and a first cache area, the first cache area having a faster data access rate than that of the main area; and

a controller including a second cache area having a faster data access rate than that of the main area, the controller being configured to:

control the non-volatile memory,

maintain a list indicative of a number of times in a specific time period each of items of data are accessed, and

move items of data stored in the main area into the first or second cache area based on the list,

wherein the controller detects data storage spaces of the first or second cache area during an idle time or at a predetermined period, reads from the list one or more items of data corresponding to the detected data storage spaces of the first or second cache area and reads data corresponding to the items of data of the list from the main area and stores the read data in the first or second cache area.

15. A memory system, comprising:

a non-volatile memory having a first access area and a second access area that has a faster data access rate than that of the first area; and

a controller including a cache area, the controller being configured to:

maintain a list indicative of the relative frequencies at which items of data are accessed, and

move items of data from the first area to the second area or from the first area to the cache area based on the list,

wherein the controller detects data storage spaces of the second area or the cache area during an idle time or at a predetermined period, reads from the list one or more items of data corresponding to the detected data storage spaces of the second area or the cache area and reads data corresponding to the items of data of the list from the first area and storing the read data in the second area or the cache area.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2018
From: LEE, HUI-WON
To: SK HYNIX INC.
Reel/Frame 047833/0219 →
Priority Claims (1)
KR 10-2018-0086791 · Jul 25, 2018 · national
Continuity (1)
Related Publication 20200034299A1 · Jan 30, 2020
Cited By (1)
US 12,307,107