IP Library Granted Patent US 10,867,752
Granted Patent B2
US 10,867,752 · App. 16/004,903 · Granted Dec 15, 2020

Capacitor and method of manufacturing the same

Inventors: Hyun Ho Shin (Suwon-Si, KR); Jeong Hoon Ryou (Suwon-Si, KR); Dong Sik Yoo (Suwon-Si, KR); No Il Park (Suwon-Si, KR); Chang Soo Jang (Suwon-Si, KR); Young Kyu Park (Suwon-Si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G4/33H01G4/012H01G4/085H01G4/1209H01G4/1236H01G4/1272H01G4/2325H01G4/248H01G4/306H01L28/87H01L28/91
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Quick Facts
Patent No.
US 10,867,752
App. No.
16/004,903
Granted
Dec 15, 2020
Kind
B2
Abstract

A capacitor includes a structure including a plurality of openings penetrating from a first surface of the structure to a second surface opposing the first surface; a capacitor layer disposed on the second surface of the structure and in the plurality of the openings and including a dielectric layer, and a first electrode and a second electrode, the dielectric layer interposed between the first electrode and the second electrode; a first connection layer disposed on the first surface of the structure and connected to the first electrode; a second connection layer disposed on the capacitor layer on the second surface and connected to the second electrode of the structure; and first and second terminals disposed on opposite side surfaces of the structure and connected to the first connection layer and the second connection layer, respectively.

Claims (36)

1. A capacitor comprising:

a structure including a plurality of openings penetrating from a first surface of the structure to a second surface opposing the first surface;

a capacitor layer disposed on the second surface of the structure and in the plurality of openings and including a dielectric layer, and a first electrode and a second electrode, the dielectric layer interposed between the first electrode and the second electrode;

a filling part comprising a conductor and disposed in a remaining space of the plurality of openings;

a first connection layer disposed on the first surface of the structure and connected to the first electrode;

a second connection layer disposed on the capacitor layer and connected to the second electrode on the second surface of the structure;

first and second terminals disposed on opposite side surfaces of the structure and connected to the first connection layer and the second connection layer, respectively; and

a metal layer disposed between the first connection layer and the first electrode, and disposed in each of the plurality of openings.

2. The capacitor of claim 1 , wherein the structure is an anodic aluminum oxide (AAO) structure having the plurality of openings.

3. The capacitor of claim 1 , wherein the dielectric layer includes any one or combination of Al 2 O 3 , ZrO 2 , and HfO 2 , ora ZrO 2 — Al 2 O 3 — ZrO 2 composite layer (ZAZ).

4. The capacitor of claim 1 , wherein the first connection layer is disposed on the first surface of the structure other than a partial region in contact with a second side surface on which the second terminal is disposed, and

the second connection layer is disposed on the second surface of the structure other than a partial region in contact with a first side surface on which the first terminal is disposed.

5. The capacitor of claim 1 , further comprising an insulating layer disposed on a partial region of the second surface of the structure in contact with one of the side surfaces on which the second terminal is disposed to insulate between the second connection layer and the capacitor layer.

6. The capacitor of claim 1 , wherein the filling part is one of tungsten (W) or polycrystalline silicon.

7. The capacitor of claim 1 , further comprising a plurality of bodies stacked on each other,

wherein each of the plurality of the bodies includes the structure, the capacitor layer, and the first and second connection layers.

8. The capacitor of claim 1 , wherein the first electrode and the second electrode each include TiN.

9. The capacitor of claim 1 , wherein a distribution of the plurality of openings is in a range of 8.2×10 8 to 1.6×10 9 per 1 cm 2 .

10. The capacitor of claim 1 , wherein each of the plurality of openings has a size of 10 nm to 400 nm.

11. The capacitor of claim 1 , wherein the filling part includes one of tungsten (W) or polycrystalline silicon.

12. The capacitor of claim 1 , wherein the filling part is tungsten (W).

13. A method of manufacturing a capacitor, the method comprising:

preparing a structure including a plurality of openings penetrating from a first surface of the structure to a second surface of the structure opposing the first surface of the structure;

forming a first connection layer on the first surface of the structure;

after the forming of the first connection layer, forming a metal layer by an electroplating process using the first connection layer as a seed layer;

forming a capacitor layer disposed on the second surface of the structure and in the plurality of openings and including a dielectric layer, and a first electrode and a second electrode, the dielectric layer interposed between the first electrode and the second electrode;

forming a filling part comprising a conductor in a remaining space of the plurality of openings;

forming a second connection layer connected to the second electrode on the second surface of the structure; and

forming first and second terminals connected to the first connection layer and the second connection layer, respectively, on side surfaces of the structure,

wherein the metal layer is disposed between the first connection layer and the first electrode, and is disposed in each of the plurality of openings.

14. The method of claim 13 , further comprising performing anodic oxidation to form the plurality of openings in the structure which is an anodic aluminum oxide (AAO) structure.

15. The method of claim 13 , wherein the first electrode, the dielectric layer, and the second electrode are deposited in order through an atomic layer deposition (ALD) or atomic vapor deposition (AVD) process.

16. The method of claim 13 , wherein the first connection layer is formed on the first surface of the structure so as not to be in contact with a second side surface of the structure on which the second terminal is disposed, and

the second connection layer is formed on the second surface of the structure so as not to be in contact with a first side surface of the structure on which the first terminal is disposed.

17. The method of claim 13 , further comprising forming an insulating layer on a partial region of the second surface of the structure in contact with one of the side surfaces on which the second terminal is disposed.

18. The method of claim 13 , further comprising, stacking a plurality of bodies before the forming of the first and second terminals, each of the plurality of the bodies including the structure, the capacitor layer, and the first and second connection layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2018
From: SHIN, HYUN HO; RYOU, JEONG HOON; YOO, DONG SIK; PARK, NO IL; JANG, CHANG SOO; PARK, YOUNG KYU
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 046059/0477 →
Priority Claims (2)
KR 10-2017-0126108 · Sep 28, 2017 · national
KR 10-2017-0139478 · Oct 25, 2017 · national
Continuity (1)
Related Publication 20190096587A1 · Mar 28, 2019