IP Library › Granted Patent US 10,867,791
Granted Patent B2
US 10,867,791 · App. 16/497,869 · Granted Dec 15, 2020

Method for manufacturing epitaxial silicon wafer and epitaxial silicon wafer

Inventors: Naoya Nonaka (Tokyo, JP); Tadashi Kawashima (Tokyo, JP); Kenichi Mizogami (Nagasaki, JP)
Assignee: SUMCO CORPORATION
H01L21/02381C23C16/24C30B25/20C30B29/06
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Quick Facts
Patent No.
US 10,867,791
App. No.
16/497,869
Granted
Dec 15, 2020
Kind
B2
Abstract

A manufacturing method of an epitaxial silicon wafer uses a silicon wafer containing phosphorus, having a resistivity of less than 1.0 mΩ·cm. The silicon wafer has a main surface to which a (100) plane is inclined and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°5′ to 0°25′ with respect to an axis orthogonal to the main surface. The manufacturing method includes: annealing the silicon wafer at a temperature from 1200 degrees C. to 1220 degrees C. for 30 minutes or more under argon gas atmosphere (argon-annealing step); etching a surface of the silicon wafer (prebaking step); and growing the epitaxial film at a growth temperature ranging from 1100 degrees C. to 1165 degrees C. on the surface of the silicon wafer (epitaxial film growth step).

Claims (11)

1. A manufacturing method of an epitaxial silicon wafer, the epitaxial silicon wafer comprising: a silicon wafer doped with phosphorus as a dopant and having a resistivity of less than 1.0 mΩ·cm; and an epitaxial film formed on the silicon wafer,

the manufacturing method comprising:

preparing the silicon wafer comprising a main surface to which a (100) plane is inclined and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°5′ to 0°25′ with respect to an axis orthogonal to the main surface;

annealing the silicon wafer at a temperature from 1200 degrees C. to 1220 degrees C. for 30 minutes or more under argon gas atmosphere;

prebaking to etch a surface of the silicon wafer after the annealing; and

growing the epitaxial film at a growth temperature ranging from 1100 degrees C. to 1165 degrees C. on the surface of the silicon wafer after the prebaking.

2. The manufacturing method of the epitaxial silicon wafer according to claim 1 , wherein

the surface of the silicon wafer is etched at a removal dimension ranging from 150 nm to 600 nm in the prebaking.

3. An epitaxial silicon wafer comprising: a silicon wafer doped with phosphorus as a dopant and having a resistivity of less than 1.0 mΩ·cm; and an epitaxial film formed on the silicon wafer,

the silicon wafer comprising a main surface to which a (100) plane is inclined and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°5′ to 0°25′ with respect to an axis orthogonal to the main surface,

wherein a density of a dislocation line having a crystal orientation and entirely located inside the epitaxial film is equal to or less than 10 pieces per square centimeter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2019
From: NONAKA, NAOYA; KAWASHIMA, TADASHI; MIZOGAMI, KENICHI
To: SUMCO CORPORATION
Reel/Frame 050499/0500 →
Priority Claims (1)
JP 2017-076034 · Apr 6, 2017 · national
Continuity (1)
Related Publication 20200027727A1 · Jan 23, 2020