Electronic device for generating a boosted signal by using signals with normal activation levels instead of a supply voltage

1. An electronic device, comprising:

a first driver suitable for driving an output node with a first voltage based on an activation control signal for a first driving period;

a second driver suitable for driving the output node with a second voltage based on a deactivation control signal for a second driving period;

a first booster suitable for boosting voltage of the output node based on an output boost signal for a first boost period;

a third driver suitable for driving a control node with a second blocking control signal based on a first blocking control signal for a third driving period; and

a blocker suitable for selectively blocking between the first driver and the output node based on a control voltage applied to the control node.

2. The electronic device of claim 1 , wherein the blocker blocks between the first driver and the output node for a blocking period including the first boost period.

3. The electronic device of claim 1 , wherein the blocker includes a plurality of switching elements coupled in series to each other.

4. The electronic device of claim 1 , further comprising:

a second booster suitable for boosting voltage of the control node based on a blocking boost signal for a second boost period.

5. The electronic device of claim 4 , wherein the second boost period includes the first boost period.

6. The electronic device of claim 1 , wherein the first booster includes a capacitor, capacitance of which is set in consideration of parasitic capacitance of a load coupled to the output node.

7. An electronic device, comprising:

a pixel array suitable for generating pixel signals based on a reset control signal, a transmission control signal and a selection control signal; and

a controller suitable for generating any one of the reset control signal, the transmission control signal and the selection control signal based on a supply voltage, and generating remaining signals among the reset control signal, the transmission control signal and the selection control signal based on various signals generated for a set period,

wherein each of the various signals has a first activation level,

wherein the remaining signals have a second activation level that is greater than the first activation level.

8. The electronic device of claim 7 , wherein the various signals include an activation control signal, a deactivation control signal, an output boost signal, first and second blocking control signals, and a blocking boost signal, and wherein the controller includes:

a first driver suitable for driving an output node with a first voltage based on the activation control signal for a first driving period, where the remaining signals are generated from the output node;

a second driver suitable for driving the output node with a second voltage based on a deactivation control signal for a second driving period;

a first booster suitable for boosting voltage of the output node based on the output boost signal for a first boost period;

a third driver suitable for driving a control node with the second blocking control signal based on the first blocking control signal for a third driving period;

a second booster suitable for boosting voltage of the control node based on the blocking boost signal for a second boost period; and

a blocker suitable for selectively blocking between the first driver and the output node based on a control voltage applied to the control node.

9. The electronic device of claim 8 , wherein the blocker blocks between the first driver and the output node for a blocking period including the first boost period.

10. The electronic device of claim 8 , wherein the blocker includes a plurality of switching elements coupled in series to each other.

11. The electronic device of claim 8 , wherein the second boost period includes the first boost period.

12. The electronic device of claim 8 , wherein the first booster includes a capacitor, capacitance of which is set in consideration of parasitic capacitance of the pixel array coupled to the output node.

13. An electronic circuit, comprising:

a control node;

an output node suitable for outputting an output signal;

a pull-up driver suitable for driving the output node with a source voltage based on an activation control signal for a first driving period;

a pull-down driver suitable for driving the output node with a ground voltage based on a deactivation control signal for a second driving period;

an output booster suitable for boosting voltage of the output node based on an output boost signal for a first boost period;

a blocker suitable for selectively blocking between the pull-up driver and the output node based on a control voltage applied to the control node;

an blocking booster suitable for boosting voltage of the control node based on a blocking boost signal for a second boost period; and

an blocking driver suitable for driving the control node with a second blocking control signal based on a first blocking control signal for a third driving period,

wherein the second boost period follows the first driving period, and the second driving period follows the second boost period,

wherein the second boost period includes the first boost period, and

wherein the output signal in the first boost period has a voltage level greater than the source voltage.