IP Library Granted Patent US 10,872,982
Granted Patent B2
US 10,872,982 · App. 15/045,298 · Granted Dec 22, 2020

Semiconductor device and method for manufacturing the same

Inventors: Shinji Ohno (Kanagawa, JP); Hirokazu Watanabe (Kanagawa, JP); Naoto Kusumoto (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L21/425H01L29/247H01L29/66969H01L29/7869H01L29/78696
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,872,982
App. No.
15/045,298
Granted
Dec 22, 2020
Kind
B2
Abstract

A transistor excellent in electrical characteristics and a method for manufacturing the transistor are provided. The transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel formation region over an insulating surface; a gate insulating film over the oxide semiconductor layer; a gate electrode overlapping with the channel formation region, over the gate insulating film; a source electrode in contact with the source region; and a drain electrode in contact with the drain region. The source region and the drain region include a portion having higher oxygen concentration than the channel formation region.

Claims (14)

1. A method for manufacturing a semiconductor device with a single-gate transistor, comprising the steps of:

forming an oxide semiconductor layer containing indium and zinc over an insulating surface;

forming a source electrode and a drain electrode in contact with part of the oxide semiconductor layer;

forming a gate insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode; and

adding oxygen to the oxide semiconductor layer in a region that does not overlap with the source electrode and the drain electrode after the formation of the gate insulating film, wherein the oxygen is added by an ion implantation method, an ion doping method or a plasma immersion ion implantation method.

2. The method for manufacturing the semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer is formed by a sputtering method, a molecular beam epitaxy method, a CVD method, a pulse laser deposition method, or an atomic layer deposition method.

3. A method for manufacturing a semiconductor device with a single-gate transistor, comprising the steps of:

forming an oxide semiconductor layer containing indium and zinc over an insulating surface;

forming an electrode in contact with part of the oxide semiconductor layer;

forming a silicon oxynitride film over the oxide semiconductor layer and the electrode; and

adding oxygen to the oxide semiconductor layer in a region that does not overlap with the electrode after the formation of the silicon oxynitride film, wherein the oxygen is added by an ion implantation method, an ion doping method or a plasma immersion ion implantation method.

4. The method for manufacturing the semiconductor device according to claim 3 ,

wherein the oxide semiconductor layer is formed by a sputtering method, a molecular beam epitaxy method, a CVD method, a pulse laser deposition method, or an atomic layer deposition method.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2016
From: OHNO, SHINJI; WATANABE, HIROKAZU; KUSUMOTO, NAOTO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 038295/0890 →
Priority Claims (1)
JP 2012-040837 · Feb 28, 2012 · national
Continuity (2)
Division 13775408 · Feb 25, 2013
Related Publication 20160163880A1 · Jun 9, 2016
Cited By (2)
US 12,439,646 US 12,581,737