IP Library Granted Patent US 10,876,220
Granted Patent B2
US 10,876,220 · App. 16/740,025 · Granted Dec 29, 2020

SiC epitaxial wafer, manufacturing apparatus of SiC epitaxial wafer, fabrication method of SiC epitaxial wafer, and semiconductor device

Inventor: Hirokuni Asamizu (Kyoto, JP)
Assignee: ROHM CO., LTD.
C30B29/36C23C16/42C30B25/183C30B25/20H01L21/0262H01L21/02378H01L21/02433H01L21/02447H01L21/02529H01L29/12H01L29/1608H01L29/32H01L29/78H01L29/872H01L21/0242H01L21/02376H01L21/02389H01L29/7802H01L29/7813
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Quick Facts
Patent No.
US 10,876,220
App. No.
16/740,025
Granted
Dec 29, 2020
Kind
B2
Abstract

A SiC epitaxial wafer includes: a substrate having an off angle of less than 4 degrees; and a SiC epitaxial growth layer disposed on the substrate having the off angle of less than 4 degrees, wherein an Si compound is used for a supply source of Si, and a C compound is used as a supply source of C, for the SiC epitaxial growth layer, wherein the uniformity of carrier density is less than 10%, and the defect density is less than 1 count/cm 2 ; and a C/Si ratio of the Si compound and the C (carbon) compound is within a range of 0.7 to 0.95. There is provide a high-quality SiC epitaxial wafer excellent in film thickness uniformity and uniformity of carrier density, having the small number of surface defects, and capable of reducing costs, also in low-off angle SiC substrates on SiC epitaxial growth.

Claims (30)

1. A SiC epitaxial wafer comprising:

a substrate having off angle;

a first SiC epitaxial growth layer disposed on the substrate; and

a second SiC epitaxial growth layer disposed on the first SiC epitaxial growth layer, wherein

the first SiC epitaxial growth layer is thinner than the SiC second epitaxial growth layer and has a lower defect density than a defect density of the second epitaxial growth layer, wherein

the uniformity of carrier density of the second SiC epitaxial growth layer is less than 10%, and the defect density of the second SiC epitaxial growth layer is less than 1 count/cm 2 .

2. The SiC epitaxial wafer according to claim 1 , wherein

the first SiC epitaxial growth layer comprises a buffer layer disposed on the substrate, and

the second SiC epitaxial growth layer comprises a drift layer disposed on the buffer layer, wherein

a Si (silicon) compound is used for a supply source of Si, and a C (carbon) compound is used as a supply source of C, for the first and second SiC epitaxial growth layers;

the uniformity of carrier density is less than 10%, and the defect density is less than 0.5 count/cm 2 ; and

the C/Si ratio of the Si compound and the C compound in the buffer layer is controlled to be lower than the C/Si ratio of the Si compound and the C compound in the drift layer.

3. The SiC epitaxial wafer according to claim 1 , wherein the off angle is equal to or less than 4 degrees.

4. The SiC epitaxial wafer according to claim 1 , wherein

the Si compound comprises at least one material selected from the group consisting of SiH 4 , SiH 3 F, SiH 2 F 2 , SiHF 3 , and SiF 4 .

5. The SiC epitaxial wafer according to claim 1 , wherein

the C compound comprises at least one material selected from the group consisting of C 3 H 8 , C 2 H 4 , C 2 H 2 , CF 4 , C 2 F 6 , C 3 F 8 , C 4 F 6 , C 4 F 8 , C 5 F 8 , CHF 3 , CH 2 F 2 , CH 3 F, and C 2 HF 5 .

6. The SiC epitaxial wafer according to claim 1 , wherein

the first and second SiC epitaxial growth layers comprise one material selected from the group consisting of 4H—SiC, 6H—SiC, 2H—SiC, and 3C—SiC.

7. The SiC epitaxial wafer according to claim 1 , wherein

a diameter of the substrate is equal to or greater than 100 mm.

8. The SiC epitaxial wafer according to claim 1 , wherein

the substrate comprises one material selected from the group consisting of 4H—SiC, 6H—SiC, BN, AlN, Al 2 O 3 , Ga 2 O 3 , diamond, carbon, and graphite.

9. A semiconductor device comprising a SiC epitaxial wafer, wherein the SiC epitaxial wafer comprises:

a substrate having low-off angle of less than 4 degrees; and

a SiC epitaxial growth layer disposed on the substrate, wherein

a Si (silicon) compound is used for a supply source of Si, and a C (carbon) compound is used as a supply source of C, for the SiC epitaxial growth layer, wherein

the uniformity of carrier density is less than 10%, and the defect density is less than 1 count/cm 2 ; and a C/Si ratio between the Si compound and the C compound is within a range of 0.7 to 0.95.

10. The semiconductor device according to claim 9 , wherein

the semiconductor device comprises one selected from the group consisting of a SiC Schottky barrier diode, a SiC-MOSFET, a SiC bipolar junction transistor, a SiC diode, a SiC thyristor, and a SiC insulated gate bipolar transistor.

Priority Claims (1)
JP 2015-182974 · Sep 16, 2015 · national
Continuity (4)
Continuation 16397662 · Apr 29, 2019
Continuation 15918434 · Mar 12, 2018
Continuation PCTJP2016074794 · Aug 25, 2016
Related Publication 20200149188A1 · May 14, 2020