Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers
Techniques for reducing the specific contact resistance of metal—semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal—group IV semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (FET). The monolayers of group III and group V atoms are predominantly ordered layers of atoms formed on the surface of the group IV semiconductor and chemically bonded to the surface atoms of the group IV semiconductor.
1. A method of forming an electrical contact, comprising depositing, on a surface of a group IV semiconductor, which has been prepared so as to include atoms of a first group V material near the surface, a monolayer of a second group V material, the atoms of the second group V material being epitaxially aligned with a lattice structure of the semiconductor, and depositing a metal on the monolayer of the second group V material, there being formed between the atoms of the first group V material dipoles with image charges in the metal.
2. The method of claim 1 , wherein the first group V material and the second group V material are the same group V material.
3. The method of claim 1 , wherein the group IV semiconductor is prepared by depositing the first group V material on the semiconductor at a sufficiently high temperature that atoms of the first group V material enter the semiconductor.
4. The method of claim 1 , wherein the monolayer of the second group V material is an imperfect monolayer, having gaps therein.
5. The method of claim 1 , wherein the monolayer of the second group V material is an imperfect monolayer, having excess second group V material atoms.
6. The method of claim 1 , wherein the monolayer of the second group V material is produced by way of a vapor deposition process that includes exposing the group IV semiconductor to a vapor flux of atoms of the second group V material or a flux of homonuclear molecules of the second group V material generated by thermally evaporating a source of the second group V material, or by a chemical reaction.
7. The method of claim 4 , wherein the monolayer of the second group V material is produced by way of a vapor deposition process that includes exposing the group IV semiconductor to a vapor flux of atoms of the second group V material or a flux of homonuclear molecules of the second group V material generated by thermally evaporating a source of the second group V material, or by a chemical reaction.
8. The method of claim 5 , wherein the monolayer of the second group V material is produced by way of a vapor deposition process that includes exposing the group IV semiconductor to a vapor flux of atoms of the second group V material or a flux of homonuclear molecules of the second group V material generated by thermally evaporating a source of the second group V material, or by a chemical reaction.
9. The method of claim 1 , wherein atoms of the second group V material are deposited on the semiconductor surface by decomposition of a vapor phase compound of the second group V material.
10. The method of claim 9 , wherein the second group V material is a hydride of one of ammonia, phosphine, arsine, or stibine.
11. The method of claim 4 , wherein atoms of the second group V material are deposited on the semiconductor surface by decomposition of a vapor phase compound of the second group V material.
12. The method of claim 11 , wherein the second group V material is a hydride of one of ammonia, phosphine, arsine, or stibine.
13. The method of claim 5 , wherein atoms of the second group V material are deposited on the semiconductor surface by decomposition of a vapor phase compound of the second group V material.
14. The method of claim 13 , wherein the second group V material is a hydride of one of ammonia, phosphine, arsine, or stibine.
15. The method of claim 1 , wherein the group IV semiconductor comprises any of germanium, silicon, an alloy of silicon and germanium, an alloy of germanium and tin, an alloy of silicon with carbon, a compound of silicon and carbon, an alloy of germanium with carbon, a compound of germanium and carbon.
16. The method of claim 4 , wherein the group IV semiconductor comprises any of germanium, silicon, an alloy of silicon and germanium, an alloy of germanium and tin, an alloy of silicon with carbon, a compound of silicon and carbon, an alloy of germanium with carbon, a compound of germanium and carbon.
17. The method of claim 5 , wherein the group IV semiconductor comprises any of germanium, silicon, an alloy of silicon and germanium, an alloy of germanium and tin, an alloy of silicon with carbon, a compound of silicon and carbon, an alloy of germanium with carbon, a compound of germanium and carbon.
18. The method of claim 1 , wherein the second group V material comprises any one of nitrogen, phosphorus, arsenic and antimony; or a mixture of any two or more of nitrogen, phosphorus, arsenic and antimony atoms.
19. The method of claim 4 , wherein the second group V material comprises any one of nitrogen, phosphorus, arsenic and antimony; or a mixture of any two or more of nitrogen, phosphorus, arsenic and antimony atoms.
20. The method of claim 5 , wherein the second group V material comprises any one of nitrogen, phosphorus, arsenic and antimony; or a mixture of any two or more of nitrogen, phosphorus, arsenic and antimony atoms.
21. The method of claim 1 , wherein the surface of the group IV semiconductor is a {111}-oriented surface or a {100}-oriented surface.
22. The method of claim 4 , wherein the surface of the group IV semiconductor is a {111}-oriented surface or a {100}-oriented surface.
23. The method of claim 5 , wherein the surface of the group IV semiconductor is a {111}-oriented surface or a {100}-oriented surface.
24. The method of claim 1 , wherein a {100}-oriented surface of the group IV semiconductor is etched with a crystallographically selective etch to reveal and expose multiple {111}-oriented semiconductor crystal facets, and the monolayer of the second group V material is formed on the {111} facets.
25. The method of claim 4 wherein a {100}-oriented surface of the group IV semiconductor is etched with a crystallographically selective etch to reveal and expose multiple {111}-oriented semiconductor crystal facets, and the monolayer of the second group V material is formed on the {111} facets.
26. The method of claim 5 , wherein a {100}-oriented surface of the group IV semiconductor is etched with a crystallographically selective etch to reveal and expose multiple {111}-oriented semiconductor crystal facets, and the monolayer of the second group V material is formed on the {111} facets.
27. The method of claim 1 , wherein the metal is one of: a metal silicide, a nickel silicide, a composition NiSi, a platinum silicide, a barrier metal consisting of tantalum nitride or titanium nitride or ruthenium, or a ferromagnetic metal comprising one or more of nickel, cobalt, iron and/or gadolinium.
28. The method of claim 4 , wherein the metal is one of: a metal silicide, a nickel silicide, a composition NiSi, a platinum silicide, a barrier metal consisting of tantalum nitride or titanium nitride or ruthenium, or a ferromagnetic metal comprising one or more of nickel, cobalt, iron and/or gadolinium.
29. The method of claim 5 , wherein the metal is one of: a metal silicide, a nickel silicide, a composition NiSi, a platinum silicide, a barrier metal consisting of tantalum nitride or titanium nitride or ruthenium, or a ferromagnetic metal comprising one or more of nickel, cobalt, iron and/or gadolinium.