Solid-state imaging element, electronic device, and method for correcting uneven luminance

1. A solid-state imaging element, comprising:

a pixel array including a plurality of lines,

wherein each of the plurality of lines includes a specific number of pixels in a specific direction;

a scanning circuit configured to:

control selection of a first line of the plurality of lines; and

control output of a first number of analog signals based on the selection of the first line;

a first column analog-to-digital converter that includes a plurality of reference signal converters and a plurality of effective pixel signal converters, wherein

the plurality of reference signal converters and the plurality of effective pixel signal converters include a specific number of analog-to-digital converters,

the specific number of analog-to-digital converters are configured to convert the first number of analog signals into a specific number of digital signals, and

each of the plurality of effective pixel signal converters is between corresponding reference signal converters of the plurality of reference signal converters; and

a logic circuit configured to execute a black level correction process on the specific number of digital signals.

2. The solid-state imaging element according to claim 1 , wherein

the first number of analog signals includes effective pixel signals and reference signals,

each of the reference signals indicates a black level,

the plurality of effective pixel signal converters is configured to:

convert the effective pixel signals into a first set of digital signals of the specific number of digital signals; and

output the first set of digital signals as effective pixel data,

the plurality of reference signal converters is configured to:

convert the reference signals into a second set of digital signals of the specific number of digital signals; and

output the second set of digital signals as reference data

the logic circuit is further configured to obtain a difference between the effective pixel data and the reference data, and

the obtainment of the difference corresponds to the black level correction process.

3. The solid-state imaging element according to claim 2 , further comprising a dummy circuit configured to generate the reference signals,

wherein, based on the selection of the first line, the scanning circuit is further configured to:

drive each of the specific number of pixels in the first line;

control the specific number of pixels to output the effective pixel signals; and

control the dummy circuit to output the reference signals.

4. The solid-state imaging element according to claim 2 , wherein

the pixel array includes effective pixels and light-shielding pixels,

the effective pixels are configured to generate the effective pixel signals, and

the light-shielding pixels are configured to generate the reference signals.

5. The solid-state imaging element according to claim 4 , wherein

the plurality of lines further includes:

a plurality of effective pixel lines that includes the effective pixels in the specific direction, and

a light-shielding pixel line that includes the light-shielding pixels in the specific direction, and the scanning circuit is further configured to:

simultaneously select an effective pixel line of the plurality of effective pixel lines and the light-shielding pixel line; and

control the selected effective pixel line and the light-shielding pixel line to output the effective pixel signals and the reference signals, respectively.

6. The solid-state imaging element according to claim 4 , wherein

each of the plurality of lines further includes the effective pixels and the light-shielding pixels,

the scanning circuit is further configured to:

control the effective pixels to output the effective pixel signals; and

control the light-shielding pixels to output the reference signals,

a number of the effective pixel signals is equal to a number of the effective pixels in the first line, and

a number of the reference signals is more than a number of the light-shielding pixels in the first line.

7. The solid-state imaging element according to claim 1 , wherein

the first column analog-to-digital converter and the logic circuit are on a first substrate,

the pixel array and the scanning circuit are on a second substrate, and

the second substrate is on the first substrate.

8. The solid-state imaging element according to claim 1 , wherein

the first column analog-to-digital converter further includes a second column analog-to-digital converter and a third column analog-to-digital converter, and

the scanning circuit is further configured to:

simultaneously select the first line and a second line of the plurality of lines;

control the output of the first number of analog signals, corresponding to the first line, to the second column analog-to-digital converter; and

control output of a second number of analog signals, corresponding to the second line, to the third column analog-to-digital converter.

9. The solid-state imaging element according to claim 1 ,

wherein the black level correction process includes multiplication of each of the specific number of digital signals by a correction coefficient set for each of the plurality of lines.

10. An electronic device, comprising:

a pixel array including a plurality of lines,

wherein each of the plurality of lines includes a specific number of pixels in a specific direction;

a scanning circuit configured to:

control selection of a line of the plurality of lines; and

control output of a specific number of analog signals based on the selection of the line;

a column analog-to-digital converter that includes a plurality of reference signal converters and a plurality of effective pixel signal converters, wherein

the plurality of reference signal converters and the plurality of effective pixel signal converters include a specific number of analog-to-digital converters,

the specific number of analog-to-digital converters are configured to convert the specific number of analog signals into a specific number of digital signals, and

each of the plurality of effective pixel signal converters is between corresponding reference signal converters of the plurality of reference signal converters;

a logic circuit configured to execute a black level correction process on the specific number of digital signals; and

a signal processing circuit configured to process the specific number of digital signals based on the black level correction process.

11. A control method comprising:

controlling, by a scanning circuit of a solid-state imaging element, selection of a line of a plurality of lines of a pixel array of the solid-state imaging element,

wherein each of the plurality of lines includes a specific number of pixels in a specific direction;

controlling, by the scanning circuit based on the selection of the line, output of a specific number of analog signals to a column analog-to-digital converter of the solid-state imaging element, wherein

the column analog-to-digital converter includes a plurality of reference signal converters and a plurality of effective pixel signal converters,

the plurality of reference signal converters and the plurality of effective pixel signal converters include a specific number of analog-to-digital converters, and

each of the plurality of effective pixel signal converters is between corresponding reference signal converters of the plurality of reference signal converters;

converting, by the specific number of analog-to-digital converters, the specific number of analog signals into a specific number of digital signals; and

executing, by a logic circuit of the solid-state imaging element, a black level correction process on the specific number of digital signals.