Method and apparatus with neural network performing deconvolution

1. A neural network apparatus, the apparatus comprising:

a memory configured to store a first kernel; and

a processor configured to:

obtain, from the memory, the first kernel;

generate, in a compiling step, a second kernel by adjusting an arrangement of matrix elements comprised in the first kernel by performing a transpose operation;

generate, in the compiling step, sub-kernels by dividing the second kernel by performing a split operation;

perform a convolution operation between an input feature map and the sub-kernels using a convolution operator; and

generate an output feature map, as a deconvolution of the input feature map, by merging results of the convolution operation.

2. The apparatus of claim 1 , wherein the processor is further configured to:

obtain, from the memory, information of a stride, and

generate the sub-kernels by dividing the second kernel based on the information of the stride.

3. The apparatus of claim 2 , wherein:

the processor is further configured to divide the second kernel into the sub-kernels, and

the number of the sub-kernels corresponds to a value obtained by squaring a value of the stride.

4. The apparatus of claim 1 , wherein the processor is configured to perform the convolution operation, using the convolution operator, in a deconvolution layer of a neural network, where the neural network further comprises a convolutional layer that performs a corresponding convolution operation using the convolution operator, and a fully connected layer.

5. The apparatus of claim 1 , wherein the processor is further configured to:

process the sub-kernels in parallel, by performing the convolution operation between the sub-kernels and the input feature map by shifting each of the sub-kernels with respect to the input feature map, and

generate the output feature map by merging results of the parallel processing of the sub-kernels.

6. A neural network apparatus, the apparatus comprising:

a memory configured to store sub-kernels; and

a processor configured to:

obtain, from the memory, the sub-kernels,

perform a convolution operation between an input feature map and the sub-kernels using a convolution operator, and

generate an output feature map, as a deconvolution of the input feature map, by merging results of the convolution operation,

wherein the sub-kernels obtained from the memory are generated in a compiling step by adjusting an arrangement of matrix elements comprised in an initial kernel by performing a transpose operation, and dividing the adjusted initial kernel by performing a split operation.

7. The apparatus of claim 6 , wherein the number of the sub-kernels divided from the initial kernel is determined based on a stride value stored in the memory.

8. The apparatus of claim 7 , wherein the number of the sub-kernels corresponds to a value obtained by squaring the stride value.

9. The apparatus of claim 6 , wherein the processor is configured to perform the convolution operation, using the convolution operator, in a deconvolution layer of a neural network, where the neural network further comprises a convolutional layer that performs a corresponding convolution operation using the convolution operator, and a fully connected layer.

10. The apparatus of claim 6 , wherein the processor is further configured to:

process the sub-kernels in parallel, by performing the convolution operation between the sub-kernels and the input feature map by shifting each of the sub-kernels with respect to the input feature map, and

generate the output feature map by merging results of the parallel processing of the sub-kernels.

11. A processor-implemented neural network method, the method comprising:

obtaining, from a memory, a first kernel,

generating, in a compiling step, a second kernel by adjusting an arrangement of matrix elements comprised in the first kernel by performing a transpose operation;

generating, in the compiling step, sub-kernels by dividing the second kernel by performing a split operation;

performing a convolution operation between an input feature map and the sub-kernels using a convolution operator; and

generating an output feature map, as a deconvolution of the input feature map, by merging results of the convolution operation.

12. The method of claim 11 , wherein the generating of the sub-kernels comprises generating the sub-kernels by dividing the second kernel based on information of a stride.

13. The method of claim 12 , wherein:

the second kernel is divided into the sub-kernels, and

the number of the sub-kernels corresponds to a value obtained by squaring a value of the stride.

14. The method of claim 11 , further comprising performing the convolution operation, using the convolution operator, in a deconvolution layer of a neural network, where the neural network further comprises a convolutional layer that performs a corresponding convolution operation using the convolution operator, and a fully connected layer.

15. The method of claim 11 , wherein the generating of the output feature map comprises:

processing the sub-kernels in parallel, by performing the convolution operation between the sub-kernels and the input feature map by shifting each of the sub-kernels with respect to the input feature map, and

generating the output feature map by merging results of the parallel processing of the sub-kernels.

16. The method of claim 11 , wherein matrix elements of the output feature map, corresponding to results from the convolution operation between the input feature map and a sub-kernel of the sub-kernels, are separated by a stride of the convolution operation.

17. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the method of claim 11 .