Field plates on two opposed surfaces of double-base bidirectional bipolar transistor: devices, methods, and systems

1. A power semiconductor device, comprising:

first and second first-conductivity-type emitter/collector regions, located respectively on first and second surfaces of a second-conductivity-type semiconductor die;

first and second second-conductivity-type base contact regions, located respectively on the first and second surface of the semiconductor die;

first and second entrenched field plate structures, located respectively on the first and second surface of the semiconductor die; wherein the entrenched field plate structures are conductive, and are insulated from the bulk of the semiconductor die, and are vertically extended, and laterally adjoin the emitter/collector regions, and also laterally adjoin the base contact regions;

wherein, on each of the surfaces, an emitter/collector region and a base contact region are separated by an entrenched field plate structure, the entrenched field plate structure adjoining both the emitter/collector region and also the base contact region;

wherein the first and second emitter/collector regions, and also the first and second base contact regions, are each connected to a respectively corresponding external connection; and

first and second field-limiting ring structures, located respectively on the first and second surfaces of the die; wherein the first field-limiting ring structure laterally surrounds the first emitter/collector region, the first entrenched field plate structure, and the first base contact region; and wherein the second field-limiting ring structure laterally surrounds the second emitter/collector region, the second entrenched field plate structure, and the second base contact region;

whereby the breakdown voltage is improved under either polarity of applied voltage.

2. The device of claim 1 , wherein the first conductivity type is n-type.

3. The device of claim 1 , wherein the semiconductor die is silicon.

4. The device of claim 1 , wherein the insulated field plate structures comprise doped polysilicon field plates inside oxide-lined trenches.

5. The device of claim 1 , wherein the first conductivity type is p-type.

6. The device of claim 1 , further comprising a plurality of first additional field-limiting ring structures which laterally surround the first field-limiting ring structure, and also comprising a plurality of second additional field-limiting ring structures which laterally surround the second field-limiting ring structure.

7. The device of claim 6 , wherein the plurality of first additional field-limiting ring structures includes at least nine such structures, and the plurality of second additional field-limiting ring structures includes at least nine such structures.

8. The device of claim 1 , wherein the first emitter/collector region is directly electrically connected to the first entrenched field plate structure through a first common electrode, and wherein the second emitter/collector region is directly electrically connected to the second entrenched field plate structure through a second common electrode.

9. The device of claim 6 , wherein the additional field-limiting ring structures include a plurality of first-conductivity-type doped regions, laterally separated from each other by a plurality of insulating regions.

10. The device of claim 9 , wherein the insulating regions in the field-limiting ring structures are silicon dioxide.

11. The device of claim 6 , wherein the field-limiting ring structures each include a plurality of first-conductivity-type doped regions, laterally separated from each other by a plurality of insulating regions; and wherein the doping profile of the lower parts of the first-conductivity-type doped regions in the field-limiting ring structures is generally the same as that in the lower parts of the emitter/collector regions.