IP Library Granted Patent US 10,897,255
Granted Patent B2
US 10,897,255 · App. 16/774,898 · Granted Jan 19, 2021

Drive circuit

Inventor: Masashi Akahane (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H03K19/017509H03K17/687H03K2217/0063H03K2217/0072
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Quick Facts
Patent No.
US 10,897,255
App. No.
16/774,898
Granted
Jan 19, 2021
Kind
B2
Abstract

A drive circuit of a power device, including a set-side level shift circuit that receives a set signal and generates a level-shifted set signal, a reset-side level shift circuit that receives a reset signal and generates a level-shifted reset signal, a control circuit that is connected to the set-side level shift circuit and the reset-side level shift circuit, and that outputs a drive signal, a level of the drive signal changing between a first logic level for turning off the power device based on the level-shifted reset signal and a second logic level for turning on the power device based on the level-shifted set signal, and an ensuring circuit that ensures, based on the drive signal, that the control circuit controls to turn on the power device responsive to the level-shifted set signal, and to turn off the power device responsive to the level-shifted reset signal.

Claims (43)

1. A drive circuit of a power device, comprising:

a set-side level shift circuit that receives a set signal and generates a level-shifted set signal by shifting a level of the set signal;

a reset-side level shift circuit that receives a reset signal and generates a level-shifted reset signal by shifting a level of the reset signal;

a control circuit that is connected to the set-side level shift circuit and the reset-side level shift circuit, and that outputs a drive signal, a level of the drive signal changing between

a first logic level for turning off the power device based on the level-shifted reset signal,

and

a second logic level for turning on the power device based on the level-shifted set signal; and

an ensuring circuit that ensures, based on the drive signal, that the control circuit controls to turn on the power device responsive to the level-shifted set signal, and to turn off the power device responsive to the level-shifted reset signal, wherein

each of the level-shifted set signal and the level-shifted reset signal changes between a reference potential and a high potential higher than the reference potential; and

the ensuring circuit includes:

a set-side diode that is so configured that a cathode thereof is coupled to a line of the high potential and an anode thereof is coupled to an output node of the set-side level shift circuit when the drive signal is at the second logic level, and

a reset-side diode that is so configured that a cathode thereof is coupled to the line of the high potential and an anode thereof is coupled to the output node of the reset-side level shift circuit when the drive signal is at the first logic level.

2. The drive circuit according to claim 1 , wherein

when the drive signal is at the first logic level, a state of the set-side diode, in which the cathode is coupled to the line of the high potential and the anode is coupled to the output node of the set-side level shift circuit, is canceled, and

when the drive signal is at the second logic level, a state of the reset-side diode, in which the cathode is coupled to the line of the high potential and the anode is coupled to the output node of the reset-side level shift circuit, is canceled.

3. The drive circuit according to claim 1 , wherein the ensuring circuit includes:

a set-side switching device coupled in series with the set-side diode between the line of the high potential and the output node of the set-side level shift circuit, the set-side switching device being configured to be on when the drive signal is at the second logic level, and be off when the drive signal is at the first logic level, and

a reset-side switching device coupled in series with the reset-side diode between the line of the high potential and the output node of the reset-side level shift circuit, the reset-side switching device being configured to be on when the drive signal is at the first logic level and be off when the drive signal is at the second logic level.

4. The drive circuit according to claim 1 , further comprising:

an adjustment circuit that

reduces impedance between the line of the high potential and the output node of the set-side level shift circuit and increases impedance between the line of the high potential and the output node of the reset-side level shift circuit, when the drive signal is at the first logic level, and

increases the impedance between the line of the high potential and the output node of the set-side level shift circuit and reduces the impedance between the line of the high potential and the output node of the reset-side level shift circuit, when the drive signal is at the second logic level.

5. The drive circuit according to claim 4 , wherein

the set-side level shift circuit includes:

a set-side resistor coupled to the line of the high potential, and

a set-side level shift switching device coupled in series with the set-side resistor between the line of the high potential and a line of the reference potential, the set-side level shift switching device being configured to be turned on and off based on the set signal,

a node between the set-side level shift switching device and the set-side resistor being the output node of the set-side level shift circuit;

the reset-side level shift circuit includes:

a reset-side resistor coupled to the line of the high potential, and

a reset-side level shift switching device coupled in series with the reset-side resistor between the line of the high potential and the line of the reference potential, the reset-side level shift switching device being configured to be turned on and off based on the reset signal,

a node between the reset-side level shift switching device and the reset-side resistor being the output node of the reset-side level shift circuit; and

the adjustment circuit includes:

a second set-side resistor that is so configured that one end thereof is coupled to the line of the high potential and another end thereof is coupled to the output node of the set-side level shift circuit when the drive signal is at the first logic level; and

a second reset-side resistor that is so configured that one end thereof is coupled to the line of the high potential and another end thereof is coupled to the output node of the reset-side level shift circuit when the drive signal is at the second logic level.

6. The drive circuit according to claim 5 , wherein

when the drive signal is at the second logic level, a state of the second set-side resistor, in which the one end thereof is coupled to the line of the high potential and the other end thereof is coupled to the output node of the set-side level shift circuit, is canceled, and

when the drive signal is at the first logic level, a state of the second reset-side resistor, in which the one end thereof is coupled to the line of the high potential and the other end thereof is coupled to the output node of the reset-side level shift circuit, is canceled.

7. The drive circuit according to claim 5 , wherein the adjustment circuit includes:

a second set-side switching device coupled in series with the second set-side resistor between the line of the high potential and the output node of the set-side level shift circuit, the second set-side switching device being configured to be off when the drive signal is at the second logic level and be on when the drive signal is at the first logic level; and

a second reset-side switching device coupled in series with the second reset-side resistor between the line of the high potential and the output node of the reset-side level shift circuit, the second reset-side switching device being configured to be on when the drive signal is at the second logic level and be off when the drive signal is at the first logic level.

8. The drive circuit according to claim 1 , further comprising:

a set-side ensuring diode having an anode coupled to the output node of the set-side level shift circuit and a cathode coupled to the line of the high potential; and

a reset-side ensuring diode having an anode coupled to the output node of the reset-side level shift circuit and a cathode coupled to the line of the high potential.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2020
From: AKAHANE, MASASHI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 051646/0459 →
Priority Claims (1)
JP 2019-043764 · Mar 11, 2019 · national
Continuity (1)
Related Publication 20200295759A1 · Sep 17, 2020