Stack packages including stacked semiconductor dies

1. A stack package comprising:

a first semiconductor die disposed on a package substrate, which includes first bonding pads;

a second semiconductor die fully overlapping the first semiconductor die and including second bonding pads disposed on a first edge region of the second semiconductor die;

first bonding wires electrically connecting the first bonding pads to the package substrate;

a first adhesive layer disposed between the first and second semiconductor dies to raise the second semiconductor die and the first adhesive layer expanding to cover the first bonding pads and portions of the first bonding wires bonded to the first bonding pads;

a third semiconductor die having a second edge region, which vertically overlaps a second edge region of the second semiconductor die and including third bonding pads disposed on a first edge region of the third semiconductor die, wherein the second edge regions of the second and third semiconductor dies extend in a Y-axis direction and the first edge regions of the second and third semiconductor dies extend in an X-axis direction from an X-Y plane;

a fourth semiconductor die vertically stacked on the third semiconductor die to include fourth bonding pads;

second bonding wires directly connecting the third bonding pads to the package substrate;

a second adhesive layer disposed between the third and fourth semiconductor dies to raise the fourth semiconductor die and expanding to cover the third bonding pads and portions of the second bonding wires bonded to the third bonding pads; and

a lifting supporter disposed between the third semiconductor die and the package substrate to raise the third semiconductor die.

2. The stack package of claim 1 , wherein the third semiconductor die partially overlaps with the second semiconductor die to reveal the second bonding pads of the second semiconductor die.

3. The stack package of claim 2 , further comprising:

third bonding wires electrically connecting the second bonding pads to the package substrate, the third bonding wires being located at a side of the second semiconductor die opposite to the first bonding wires; and

fourth bonding wires electrically connecting the fourth bonding pads to the package substrate, the fourth bonding wires being located at a side of the fourth semiconductor die opposite to the second bonding wires.

4. The stack package of claim 3 , wherein the third bonding wires are bonded to the second bonding pads and extend to be spaced apart from the third semiconductor die.

5. The stack package of claim 2 , further comprising a first dummy semiconductor die that is disposed on the second semiconductor die to be spaced apart from the third and fourth semiconductor dies.

6. The stack package of claim 5 , further comprising a molding layer covering the first to fourth semiconductor dies and the first dummy semiconductor die.

7. The stack package of claim 2 , wherein the lifting supporter is disposed on the package substrate to be laterally spaced apart from the first and second semiconductor dies.

8. The stack package of claim 2 , wherein the lifting supporter has substantially the same thickness as a stack structure including the first and second semiconductor dies and the first adhesive layer.

9. The stack package of claim 2 , wherein the lifting supporter includes a dummy semiconductor die which is attached to the third semiconductor die using a third adhesive layer.

10. The stack package of claim 9 , wherein the third adhesive layer has a thickness which is less than a thickness of the first and second adhesive layers.

11. The stack package of claim 9 , wherein the third adhesive layer extends into an interface between the second edge region of the third semiconductor die and the second edge region of the second semiconductor die to attach the third semiconductor die to the second semiconductor die.