Semiconductor device
A vertical MOSFET having a trench gate structure includes an n − -type drift layer and a p-type base layer formed by epitaxial growth. In n − -type drift layer, an n-type region, a lower second p + -type region and a first p + -type region are provided. A part of the lower second p + -type region extending in a direction opposite that of a depth of the trench and connected to the p-type base layer.
1. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type;
a first semiconductor layer of the first conductivity type provided on a front surface of the semiconductor substrate and having an impurity concentration that is lower than an impurity concentration of the semiconductor substrate;
a second semiconductor layer of a second conductivity type provided on a first side of the first semiconductor layer, opposite a second side of the first semiconductor layer facing toward the semiconductor substrate;
a first semiconductor region of the first conductivity type selectively provided in the second semiconductor layer and having an impurity concentration that is higher than the impurity concentration of the semiconductor substrate;
a trench penetrating the first semiconductor region and the second semiconductor layer, and reaching the first semiconductor layer;
a gate electrode provided in the trench, via a gate insulating film;
a second semiconductor region of the second conductivity type selectively provided in the first semiconductor layer; and
a third semiconductor region of the second conductivity type selectively provided in the first semiconductor layer, the third semiconductor region contacting a bottom of the trench, wherein
a part of a first surface of the second semiconductor region extends in a direction opposite that of a depth of the trench and is connected with the second semiconductor layer by the second semiconductor region, and
a second part of the first surface of the second semiconductor region does not extend in the direction opposite that of the depth of the trench and is not connected to the second semiconductor layer by the second semiconductor region.
2. The semiconductor device according to claim 1 , wherein
a part of the second semiconductor region contacts a sidewall of the trench.
3. The semiconductor device according to claim 1 , wherein
a width of the third semiconductor region is narrower than a width of the trench.