Modular object-oriented digital sub-system architecture with primary sequence control and synchronization
The present disclosure relates to digital signal processing architectures, and more particularly to a modular object-oriented digital system architecture ideally suited for radar, sonar and other general purpose instrumentation which includes the ability to self-discover modular system components, self-build internal firmware and software based on the modular components, sequence signal timing across the modules and synchronize signal paths through multiple system modules.
1. A modular, operationally reconfigurable digital signal processing system for radar or sonar instrumentation, the modular digital system comprising:
at least one operational card;
at least one operational sub-module comprising a first processing device, a modular expansion bus for removably receiving said at least one operational card, an external communication port, and a first synchronization interface;
a primary sequence control module comprising a second processing device and a second synchronization interface in communication with said first synchronization interface of said at least one operational sub-module, said primary sequence control module including at least one clock synthesizer providing a clock signal to said at least one operational card; and
said primary sequence control module configured and arranged to:
generate a synchronization signal based on said clock signal, and
transmit said synchronization signal to said at least one operation submodule to control the timing of operation of said at least one operational card,
wherein the modular digital system is configured to automatically reconfigure an operational mode of the radar or sonar instrumentation with each synchronization signal.
2. The modular digital system of claim 1 wherein said at least one operational card is selected from the group consisting of: an arbitrary waveform generator, a digital receiver and pulse pair processor, an N-channel analog to digital converter, an N-channel digital to analog converter, an input/output processor, a power device, and a PCIe bus.
3. The modular digital system of claim 1 , wherein the at least one operational card is an arbitrary waveform generator and said software application is further operative for synchronizing a starting phase and time of a generated waveform.
4. The modular digital system of claim 3 , further comprising a second operational card comprising a digital receiver and pulse pair processor and said software application is further operative for synchronizing digitization of a received signal and phase.
5. The modular digital system of claim 1 , wherein the at least one operational card is a digital receiver and pulse pair processor and said software application is further operative for synchronizing digitization of a received signal and phase.
6. The modular digital system of claim 1 wherein each module includes a commonly shared object-oriented firmware architecture.
7. The modular digital system of claim 1 further comprising a control interface.
8. The modular digital system of claim 1 , wherein the at least one operational sub-modules further comprise a main processor board with at least one high fidelity mezzanine expansion buses and a power/PCIe mezzanine expansion bus.
9. The modular digital system of claim 1 , wherein the primary sequence control module is further configured and arranged to synchronize said at least one operational submodule with each synchronization signal.
10. The modular digital system of claim 1 , wherein the primary sequence control module is configured and arranged to be governed by a primary sequence controller table that defines the sequence of mode to be executed and the period for each entry in the table.
11. A modular operationally reconfigurable digital radar signal processing system comprising:
an arbitrary waveform generator (AWG) card;
a digital receiver;
a pulse pair processor card (Receiver);
an operational sub-module comprising a first processing device, a modular expansion bus removably receiving said arbitrary waveform generator (AWG) card, said digital receiver, and said pulse pair processor card (Receiver), said operational submodule further comprising an external communication port and a first synchronization interface;
a primary sequence control module comprising a second processing device and a second synchronization interface in communication with said first synchronization interface of said operational sub-module, said primary sequence control module including a clock synthesizer providing a clock signal to said AWG card and said Receiver card; and
said primary sequence control module configured and arranged to:
generate a synchronization signal based on said clock signal, and
provide said synchronization signal to said operational submodule to control the timing of operation of said AWG card and said Receiver Card.
12. The modular digital radar signal processing system of claim 11 , wherein the operational sub-modules further comprise a main processor board with at least one high fidelity mezzanine expansion buses and a power/PCIe mezzanine expansion bus.
13. The modular digital radar signal processing system of claim 11 , wherein the primary sequence control module is further configured and arranged to synchronize said at least one operational submodule with each synchronization signal.
14. The modular digital radar signal processing system of claim 11 , wherein the primary sequence control module is configured and arranged to be governed by a primary sequence controller table that defines the sequence of mode to be executed and the period for each entry in the table.