Securing against errors in an error correcting code (ECC) implemented in an automotive system
In general, data is susceptible to errors caused by faults in hardware (i.e. permanent faults), such as faults in the functioning of memory and/or communication channels. To detect errors in data caused by hardware faults, the error correcting code (ECC) was introduced, which essentially provides a sort of redundancy to the data that can be used to validate that the data is free from errors caused by hardware faults. In some cases, the ECC can also be used to correct errors in the data caused by hardware faults. However, the ECC itself is also susceptible to errors, including specifically errors caused by faults in the ECC logic. A method, computer readable medium, and system are thus provided for securing against errors in an ECC.
1. An automotive system for autonomous or semi-autonomous vehicles, comprising:
a memory storing:
deep neural networks for a plurality of functions of the automotive system, and
data utilized by the deep neural networks; and
error correcting code (ECC) circuitry for:
accessing a code created for the data using the ECC circuitry, wherein the code is stored in a first portion of the memory and the data is stored in a second portion of the memory;
detecting an error in the code caused by a hardware fault in the ECC circuitry;
determining that the error in the code is correctable;
correcting the error in the code to form a corrected code;
retrieving the data from the second portion of the memory; and
verifying the retrieved data using the corrected code.
2. The automotive system of claim 1 , wherein the ECC circuitry includes an encoder and a decoder.
3. The automotive system of claim 2 , wherein the ECC circuitry is single error correcting (SEC) and the encoder of the ECC circuitry is constrained to avoid any sharing of common sub-expressions for checkbit outputs forming the code, or the ECC circuitry is single error correcting-double error detecting (SEC-DED) and the encoder of the ECC circuitry is constrained to avoid sharing of more than two common sub-expressions for the checkbit outputs forming the code.
4. The automotive system of claim 2 , wherein the ECC circuitry is single error correcting (SEC) and the decoder of the ECC circuitry is constrained to avoid any sharing of common sub-expressions for bit outputs of the decoder, or the ECC circuitry is single error correcting-double error detecting (SEC-DED) and the decoder of the ECC circuitry is constrained to avoid sharing of more than two common sub-expressions for bit outputs of the decoder.
5. The automotive system of claim 1 , wherein the ECC circuitry serves as a safety mechanism in accordance with an Automotive Safety Integrity Level (ASIL) safety metric of the ISO 26262 standard.
6. The automotive system of claim 1 , the ECC circuitry further for:
accessing a second code stored in the first portion of a memory, wherein the second code is created for second data using the ECC circuitry;
detecting an error in the second code caused by a hardware fault in the ECC circuitry; and
responsive to determining that the error in the second code is not correctable, indicating that the error in the second code is not correctable.