Circuit device and electronic apparatus
A circuit device includes a first physical layer circuit to which a first bus with a USB standard is coupled, a second physical layer circuit to which a second bus with the USB standard is coupled, and a bus monitor circuit monitoring the first bus and the second bus, in which the first physical layer circuit includes a first disconnect detection circuit which detects device disconnect in the first bus, the bus monitor circuit includes a first test signal detection circuit which detects whether or not a test signal is output to the first bus, and when detection of the device disconnect by the first disconnect detection circuit is disabled, detection of the test signal by the first test signal detection circuit is disabled.
1. A circuit device comprising:
a first physical layer circuit to which a first bus with a USB standard is coupled;
a second physical layer circuit to which a second bus with the USB standard is coupled;
a bus switch circuit turning on or off a connect between the first bus and the second bus;
a processing circuit performing transfer processing which transmits a packet received from the first bus via the first physical layer circuit to the second bus via the second physical layer circuit and transmits a packet received from the second bus via the second physical layer circuit to the first bus via the first physical layer circuit, during a period in which the bus switch circuit is turned off; and
a bus monitor circuit monitoring the first bus and the second bus, wherein
the first physical layer circuit includes a first disconnect detection circuit which detects device disconnect in the first bus,
the bus monitor circuit includes a first test signal detection circuit which detects whether or not a test signal is output to the first bus, and
when detection of the device disconnect by the first disconnect detection circuit is disabled, detection of the test signal by the first test signal detection circuit is disabled.
2. The circuit device according to claim 1 , wherein
disabling the detection of the device disconnect by the first disconnect detection circuit and disabling the detection of the test signal by the first test signal detection circuit are specified by a first disconnect detection disable signal.
3. The circuit device according to claim 1 , wherein
the second physical layer circuit includes a second disconnect detection circuit which detects device disconnect in the second bus,
the bus monitor circuit includes a second test signal detection circuit which detects whether or not the test signal is output to the second bus, and
when detection of the device disconnect by the second disconnect detection circuit is disabled, detection of the test signal by the second test signal detection circuit is disabled.
4. The circuit device according to claim 3 , wherein
disabling the detection of the device disconnect by the second disconnect detection circuit and disabling the detection of the test signal by the second test signal detection circuit are specified by a second disconnect detection disable signal.
5. The circuit device according to claim 4 , wherein
the first physical layer circuit includes a first test signal output circuit which outputs the test signal to the first bus when the second test signal detection circuit detects that the test signal is output to the second bus, and
the second physical layer circuit includes a second test signal output circuit which outputs the test signal to the second bus when the first test signal detection circuit detects that the test signal is output to the first bus.
6. The circuit device according to claim 5 , wherein
when detection of the device disconnect by the first disconnect detection circuit is disabled and detection of the test signal by the first test signal detection circuit is disabled, an output of the test signal by the second test signal output circuit is disabled, and
when detection of the device disconnect by the second disconnect detection circuit is disabled and detection of the test signal by the second test signal detection circuit is disabled, an output of the test signal by the first test signal output circuit is disabled.
7. An electronic apparatus comprising:
the circuit device according to claim 1 ; and
a central processing unit connected to the first bus.