IP Library › Granted Patent US 10,910,407
Granted Patent B2
US 10,910,407 · App. 16/478,244 · Granted Feb 2, 2021

Semiconductor device

Inventors: Yoshinori Ando (Atsugi, JP); Takashi Hamada (Atsugi, JP); Yasumasa Yamane (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225H01L27/124H01L29/66742H01L29/78693
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Quick Facts
Patent No.
US 10,910,407
App. No.
16/478,244
Granted
Feb 2, 2021
Kind
B2
Abstract

A high-performance semiconductor device is provided. The semiconductor device includes a transistor, an insulating film over the transistor, an electrode, and a metal oxide over the insulating film. The transistor includes a first gate electrode, a first gate insulating film over the first gate electrode, an oxide over the first gate insulating film, a source electrode and a drain electrode electrically connected to the oxide, a second gate insulating film over the oxide, and a second gate electrode over the second gate insulating film. The electrode includes a region in contact with the insulating film. The first gate insulating film is in contact with the insulating film. The thicknesses of the insulating film over the second gate electrode, the insulating film over the source electrode, and the insulating film over the drain electrode are substantially the same, and the insulating film includes excess oxygen.

Claims (51)

1. A semiconductor device comprising:

a transistor;

an insulating film over the transistor;

an electrode; and

a metal oxide over the insulating film,

wherein the transistor comprises:

a first gate electrode;

a first gate insulating film over the first gate electrode;

an oxide over the first gate insulating film;

a source electrode and a drain electrode electrically connected to the oxide;

a second gate insulating film over the oxide; and

a second gate electrode over the second gate insulating film,

wherein the electrode reaches the source electrode or the drain electrode through the metal oxide and the insulating film,

wherein the electrode comprises a region in contact with the insulating film,

wherein the first gate insulating film is in contact with the insulating film,

wherein the insulating film comprises a first region overlapping the second gate electrode, a second region overlapping the source electrode, and a third region overlapping the drain electrode,

wherein thickness of the first region, thickness of the second region and thickness of the third region of the insulating film are substantially the same, and

wherein the insulating film contains excess oxygen.

2. The semiconductor device according to claim 1 ,

wherein the metal oxide is configured to inhibit the passage of oxygen.

3. The semiconductor device according to claim 1 , wherein the metal oxide comprises aluminum and oxygen.

4. The semiconductor device according to claim 1 ,

wherein the oxide comprises In, an element M, and Zn, and

wherein M is Al, Ga, Y, or Sn.

5. The semiconductor device according to claim 1 , further comprising a circuit,

wherein the circuit comprises a plurality of the transistors and the electrodes, and

wherein density of the transistors in the circuit is higher than or equal to 1/μm 2 and lower than or equal to 2500/μm 2 .

6. The semiconductor device according to claim 1 , wherein a contact area between the electrode and the insulating film is less than or equal to 0.035 μm 2 .

7. The semiconductor device according to claim 1 , wherein thickness of the insulating film is greater than or equal to 40 nm.

8. A semiconductor wafer comprising:

a plurality of the semiconductor devices according to claim 1 ; and

a region for dicing.

9. The semiconductor device according to claim 1 ,

wherein each of a top surface of the insulating film and a top surface of the metal oxide includes unevenness.

10. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulator;

forming a transistor including a source electrode, a drain electrode, a gate electrode and a channel formation region in an oxide over the first insulator;

forming a second insulator over the transistor;

forming a third insulator over the second insulator to add oxygen into the second insulator;

performing heat treatment to transfer the oxygen to the oxide through the second insulator; and

forming an electrode reaching the source electrode through the second insulator and the third insulator,

wherein the second insulator comprises a first region overlapping the gate electrode, a second region overlapping the source electrode, and a third region overlapping the drain electrode, and

wherein thickness of the first region, thickness of the second region and thickness of the third region of the second insulator are substantially the same.

11. The method for manufacturing a semiconductor device according to claim 9 ,

wherein the third insulator is formed by a sputtering method and comprises aluminum and oxygen.

12. The method for manufacturing a semiconductor device according to claim 9 ,

wherein a contact area between the electrode and the second insulator is less than or equal to 0.035 μm 2 .

13. The method for manufacturing a semiconductor device according to claim 9 ,

wherein the oxide is formed over the first insulator and the second insulator is in contact with the first insulator.

14. The method for manufacturing a semiconductor device according to claim 9 ,

wherein each of a top surface of the second insulator and a top surface of the third insulator includes unevenness.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2019
From: ANDO, YOSHINORI; HAMADA, TAKASHI; YAMANE, YASUMASA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 049765/0838 →
Priority Claims (3)
JP 2017-014337 · Jan 30, 2017 · national
JP 2017-118471 · Jun 16, 2017 · national
JP 2017-156235 · Aug 11, 2017 · national
Continuity (1)
Related Publication 20190363108A1 · Nov 28, 2019
Cited By (1)
US 12,512,051