Method and apparatus for video coding
According to an aspect of the disclosure, processing circuitry decodes a constrain flag from a coded video bitstream. The constrain flag is indicative of an exclusion of decoder-side motion vector derivation (DMVD) for reference sample reconstruction. Further, the processing circuitry decodes prediction information of a current block from the coded video bitstream. The prediction information is indicative of an intra prediction mode. Then, the processing circuitry determines, in a same picture as the current block, reference samples for a sample in the current block based on the intra prediction mode and based on the exclusion of the DMVD, and reconstructs the sample of the current block according to the reference samples.
1. A method for video decoding, comprising:
decoding a constraint flag from a coded video bitstream, the constraint flag being indicative of an exclusion of decoder-side motion vector derivation (DMVD) for reference sample reconstruction;
decoding prediction information of a current block from the coded video bitstream, the prediction information being indicative of an intra prediction mode;
in response to a determination that the constraint flag indicates that the DMVD is excluded for the reference sample reconstruction, determining, in a same picture as the current block, reference samples for a sample in the current block based on the intra prediction mode in which references samples encoded according to the DMVD are excluded;
in response to a determination that the constraint flag indicates that the DMVD is not excluded for the reference sample reconstruction, determining, in the same picture as the current block, the reference samples for the sample in the current block based on the intra prediction mode in which the reference samples encoded according to the DMVD are not excluded; and
reconstructing the sample of the current block according to the reference samples.
2. The method of claim 1 , wherein the constraint flag has a first potential value that indicates that using intra prediction is permitted for the reference sample reconstruction, has a second potential value that indicates that using intra prediction and inter prediction is permitted for the reference sample reconstruction, and has a third potential value that indicates the exclusion of the DMVD for the reference sample reconstruction.
3. The method of claim 1 , further comprising:
decoding a first constraint flag that indicates that using intra prediction and inter prediction is permitted for the reference sample reconstruction; and
decoding the constraint flag that is a second constraint flag that indicates of the exclusion of the DMVD for the reference sample reconstruction.
4. The method of claim 1 , further comprising:
decoding a first constraint flag that indicates that using intra prediction is permitted for the reference sample reconstruction; and
decoding the constraint flag that is a second constraint flag that indicates the exclusion of the DMVD for the reference sample reconstruction.
5. The method of claim 1 , wherein
the constraint flag indicates that using intra prediction is permitted for the reference sample reconstruction, and
the exclusion of the DMVD for the reference sample reconstruction is inferred from the constraint flag.
6. The method of claim 1 , further comprising:
determining the reference samples in a DMVD non-latency region according to the intra prediction mode with the reference samples available for the reference sample reconstruction of the current block without delay.
7. An apparatus for video decoding, comprising:
processing circuitry configured to:
decode a constraint flag from a coded video bitstream, the constraint flag being indicative of an exclusion of decoder-side motion vector derivation (DMVD) for reference sample reconstruction;
decode prediction information of a current block from the coded video bitstream, the prediction information being indicative of an intra prediction mode;
in response to a determination that the constraint flag indicates that the DMVD is excluded for the reference sample reconstruction, determine, in a same picture as the current block, reference samples for a sample in the current block based on the intra prediction mode in which references samples encoded according to the DMVD are excluded;
in response to a determination that the constraint flag indicates that the DMVD is not excluded for the reference sample reconstruction, determining, in the same picture as the current block, the reference samples for the sample in the current block based on the intra prediction mode in which the reference samples encoded according to the DMVD are not excluded; and
reconstruct the sample of the current block according to the reference samples.
8. The apparatus of claim 7 , wherein the constraint flag has a first potential value that indicates that using intra prediction is permitted for the reference sample reconstruction, has a second potential value that indicates that using intra prediction and inter prediction is permitted for the reference sample reconstruction, and has a third potential value that indicates the exclusion of the DMVD for the reference sample reconstruction.
9. The apparatus of claim 7 , wherein the processing circuitry is further configured to:
decode a first constraint flag that indicates using intra prediction and inter prediction is permitted for the reference sample reconstruction using; and
decode the constraint flag that is a second constraint flag indicative of the exclusion of the DMVD for the reference sample reconstruction construction.