IP Library › Granted Patent US 10,914,995
Granted Patent B2
US 10,914,995 · App. 16/157,942 · Granted Feb 9, 2021

Liquid crystal display panel

Inventor: Daisuke Kajita (Hyogo, JP)
Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.; PASONA KNOWLEDGE PARTNER INC.
G02F1/136209G02F1/1368G02F1/133345G02F1/136286H01L27/124H01L27/1222H01L27/1248H01L29/78633H01L29/78669G02F2202/103G09G3/3677G09G3/3688
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Quick Facts
Patent No.
US 10,914,995
App. No.
16/157,942
Granted
Feb 9, 2021
Kind
B2
Abstract

A liquid crystal display panel includes: thin film transistors provided in corresponding one of pixels and including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer; a scanning line formed in a layer identical to that of the gate electrode and electrically connected to the gate electrode; and a first light shielding body formed in a layer identical to that of at least one of the source electrode and the drain electrode. The semiconductor layer is formed above the scanning line with an insulating layer interposed between the semiconductor layer and the scanning line, the first light shielding body is located above the scanning line and beside the semiconductor layer, and the first light shielding body and the scanning line are connected to each other through a contact hole made in the insulating layer.

Claims (34)

1. A liquid crystal display panel having a plurality of pixels arranged in a matrix comprising:

a thin film transistor provided in one of the plurality of pixels, the thin film transistor including: a gate electrode,

a source electrode,

a drain electrode, and

a semiconductor layer;

a scanning line formed in a layer identical to that of the gate electrode and electrically connected to the gate electrode;

a first light shielding body formed in a layer identical to that of at least one of the source electrode and the drain electrode;

a common electrode in which an opening is formed on the scanning line in planar view,

wherein the semiconductor layer is formed above the scanning line with an insulating layer interposed between the semiconductor layer and the scanning line,

the first light shielding body is located above the scanning line and beside the semiconductor layer,

the first light shielding body and the scanning line are connected to each other through a contact hole made in the insulating layer, and

the first light shielding body overlaps the opening of the common electrode in planar view; and

a video signal line electrically connected to the drain electrode, wherein

the first light shielding body is disposed along a first side of the semiconductor layer, the first side is along the scanning line, and

the first light shielding body is not disposed along the second side of the semiconductor layer, the second side is along the video signal line.

2. The liquid crystal display panel according to claim 1 , wherein the first light shielding body is located between an end in a width direction of the scanning line and the semiconductor layer in planar view.

3. The liquid crystal display panel according to claim 1 , wherein the first light shielding body includes a first light shielding unit located on the insulating layer and a second light shielding unit located in the contact hole.

4. The liquid crystal display panel according to claim 3 , wherein an outside leading end of the first light shielding unit in the width direction of the scanning line is located on the scanning line in planar view.

5. The liquid crystal display panel according to claim 3 , wherein

the first light shielding unit includes an upper wall surface along a top surface of the insulating layer,

the second light shielding unit includes a sidewall surface along an inside surface of the contact hole, and

the upper wall surface in the width direction of the scanning line is longer than the sidewall surface in sectional view.

6. The liquid crystal display panel according to claim 3 , wherein the inside surface of the contact hole is an inclined surface.

7. The liquid crystal display panel according to claim 1 , wherein a pair of the first light shielding bodies is provided, and the semiconductor layer is interposed between the pair of first light shielding bodies in planar view.

8. The liquid crystal display panel according to claim 7 , wherein the pair of first light shielding bodies is aligned with the width direction of the scanning line.

9. The liquid crystal display panel according to claim 1 , wherein the first light shielding body surrounds the semiconductor layer in planar view.

10. The liquid crystal display panel according to claim 1 , wherein a side surface at an end in a width direction of the scanning line is an inclined surface.

11. The liquid crystal display panel according to claim 10 , further comprising:

a first insulator covering the first light shielding body; and

a second insulator covering the first insulator,

wherein a refractive index of the second insulator is smaller than a refractive index of the first insulator.

12. The liquid crystal display panel according to claim 1 , further comprising a second light shielding body covering the semiconductor layer.

13. The liquid crystal display panel according to claim 12 , wherein the second light shielding body is made of amorphous silicon.

14. The liquid crystal display panel according to claim 1 , wherein the semiconductor layer is made of amorphous silicon.

Assignments (3)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 12, 2023
From: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 064258/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2020
From: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
To: PASONA KNOWLEDGE PARTNER INC.
Reel/Frame 052849/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2019
From: KAJITA, DAISUKE
To: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
Reel/Frame 047936/0664 →
Priority Claims (1)
JP 2017-229451 · Nov 29, 2017 · national
Continuity (1)
Related Publication 20190163025A1 · May 30, 2019