IP Library › Granted Patent US 10,931,268
Granted Patent B2
US 10,931,268 · App. 16/127,886 · Granted Feb 23, 2021

Ramp signal generation device and CMOS image sensor including the same

Inventor: Tae-Gyu Kim (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
H03K4/502H03K4/90H03M1/56H04N5/378H04N5/3742H04N5/376
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Quick Facts
Patent No.
US 10,931,268
App. No.
16/127,886
Granted
Feb 23, 2021
Kind
B2
Abstract

A ramp signal generation device includes a sampling circuit suitable for sampling a ramp current and storing a voltage corresponding to the sampled ramp current; a current maintaining circuit suitable for maintaining the ramp current; a current transferring circuit suitable for transferring a current corresponding to the voltage stored on the sampling circuit; and a current-to-voltage converter suitable for converting and generating a ramp voltage corresponding to the current transferred from the current transferring circuit.

Claims (47)

1. A ramp signal generation device, comprising:

a sampling circuit configured to sample a ramp current of the ramp signal generation device and store a voltage corresponding to the sampled ramp current;

a current maintaining circuit configured to maintain the ramp current;

a current transferring circuit configured to transfer a current corresponding to the voltage stored on the sampling circuit;

a current-to-voltage converter configured to convert and generate a ramp voltage corresponding to the current transferred from the current transferring circuit; and

an output circuit configured to stabilize and output the ramp voltage;

wherein the output circuit includes:

a switch coupled between the current-to-voltage converter and an output node; and

a capacitor coupled between the output node and a ground voltage terminal.

2. The ramp signal generation device of claim 1 , wherein the sampling circuit includes:

a capacitor having a first terminal coupled to a power supply voltage terminal, and configured to sample the ramp current and store the voltage corresponding to the sampled ramp current; and

a switching circuit coupled between a second terminal of the capacitor and the current maintaining circuit, and configured to switch the ramp current on or off.

3. The ramp signal generation device of claim 2 , wherein the switching circuit includes:

a first switch having a first terminal coupled to the second terminal of the capacitor, and configured to switch on or off the ramp current; and

a second switch coupled between a second terminal of the first switch and the current maintaining circuit, and configured to switch on or off the ramp current.

4. The ramp signal generation device of claim 1 , wherein the current transferring circuit includes a transistor having a source terminal coupled to a power supply voltage terminal, a gate terminal coupled to the sampling circuit, and a drain terminal coupled to an output node.

5. The ramp signal generation device of claim 1 , wherein the current-to-voltage converter includes:

a third switch having a first terminal coupled to an output node, and configured to switch on or off the current transferred from the current transferring circuit; and

a ramp resistor coupled between a second terminal of the third switch and a ground voltage terminal, and configured to generate the ramp voltage corresponding to the current transferred through the third switch.

6. A complementary metal-oxide-semiconductor (CMOS) image sensor, comprising:

a pixel array including pixels, configured to generate a pixel signal corresponding to incident light received at each pixel;

a row decoder coupled to the pixel array and configured to select and control the pixels of the pixel array row by row;

a ramp signal generation device configured to sample a ramp current, store a voltage corresponding to the sampled ramp current, transfer a current corresponding to the stored voltage to a ramp resistor, and generate a ramp voltage corresponding to the transferred current;

a comparison circuit configured to compare the ramp voltage applied from the ramp signal generation device with the pixel signal received from the pixel array;

a counter configured to perform a counting operation based on the comparison signal;

a memory configured to store information outputted from the counter;

a column read-out circuit configured to output the information stored in the memory; and

a controller configured to control the row decoder, the ramp signal generation device, the comparison circuit, the counter, the memory and the column read-out circuit,

wherein the ramp signal generation device includes:

a sampling circuit configured to sample the ramp current and store the voltage corresponding to the sampled ramp current;

a current maintaining circuit configured to maintain the ramp current;

a current transferring circuit configured to transfer a current corresponding to the voltage;

a current-to-voltage converter configured to convert and generate the ramp voltage corresponding to a current transferred from the current transferring circuit; and

an output circuit configured to stabilize and output the ramp voltage, which is converted by the current-voltage converter,

wherein the output circuit includes:

a switch coupled between the current-to-voltage converter and an output node; and

a capacitor coupled between the output node and a ground voltage terminal.

7. The CMOS image sensor of claim 6 , wherein the sampling circuit includes:

a capacitor having a first terminal coupled to a power supply voltage terminal and configured to sample the ramp current and storing the voltage corresponding to a sampled ramp current; and

a switching circuit coupled between a second terminal of the capacitor and the current maintaining circuit, and configured to switch the ramp current on or off.

8. The CMOS image sensor of claim 6 , wherein the switching circuit includes:

a first switch having a first terminal coupled to the second terminal of the capacitor, and configured to switch on or off the ramp current; and

a second switch coupled between a second terminal of the first switch and the current maintaining circuit, and configured to switch on or off the ramp current.

9. The CMOS image sensor of claim 6 , wherein the current transferring circuit includes a transistor having a source terminal coupled to a power supply voltage terminal, a gate terminal coupled to the sampling circuit, and a drain terminal coupled to an output node.

10. The CMOS image sensor of claim 6 , wherein the current-to-voltage converter includes:

a third switch having a first terminal coupled to an output node, and configured to switch on or off the current transferred from the current transferring circuit; and

a ramp resistor coupled between a second terminal of the third switch and a ground voltage terminal, and configured to generate the ramp voltage corresponding to the current transferred through the third switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2018
From: KIM, TAE-GYU
To: SK HYNIX INC.
Reel/Frame 047050/0749 →
Priority Claims (1)
KR 10-2018-0014627 · Feb 6, 2018 · national
Continuity (1)
Related Publication 20190245527A1 · Aug 8, 2019
Cited By (1)
US 12,262,133