Nano multilayer carbon-rich low-k spacer
A method of making a semiconductor device includes forming a gate stack on a substrate. The method further includes depositing a first spacer layer on a sidewall of the gate stack. The first spacer layer includes silicon and carbon. The method includes performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer. The method further includes depositing a second spacer layer on the first spacer layer. The second spacer layer includes silicon, carbon, and nitrogen.
1. A method of making a semiconductor device, the method comprising:
forming a gate stack on a substrate;
depositing a first spacer layer on a sidewall of the gate stack, the first spacer layer being SiC;
performing a first nitrogen plasma treatment process on the first spacer layer to increase a density of the first spacer layer; and
depositing a second spacer layer on the first spacer layer, the second spacer layer comprising silicon, carbon, and nitrogen.
2. The method of claim 1 further comprising performing a second nitrogen plasma treatment process on the second spacer layer to increase density of the second spacer layer.
3. The method of claim 1 , wherein the first spacer layer has a thickness of about 1 to about 2 nanometers (nm).
4. The method of claim 1 , wherein the SiC comprises a C to Si ratio greater than 1.9.
5. The method of claim 1 , wherein the second spacer layer comprises SiCN.
6. The method of claim 5 , wherein the SiCN includes a plurality of pores.
7. A method of making a semiconductor device, the method comprising:
forming a gate stack on a substrate;
depositing a first spacer layer on a sidewall of the gate stack, the first spacer layer comprising silicon and carbon and having a hydrogen of about 1 to about 34 atomic %;
depositing a second spacer layer on the first spacer layer, the second spacer layer comprising silicon, carbon, and nitrogen;
depositing a third spacer layer on the second spacer layer, the third spacer layer comprising silicon, carbon, and nitrogen; and
performing a nitrogen plasma treatment process on each of the first spacer layer, the second spacer layer, and the third spacer layer;
wherein a combination of the first spacer layer, the second spacer layer, and the third spacer layer has a k value of less than 4.0.
8. The method of claim 7 , wherein each of the first spacer layer, the second spacer layer, and the third spacer layer has a thickness of about 1 to about 2 nanometers (nm).
9. The method of claim 7 , wherein each of the second spacer layer and third spacer layer comprises SiCN.
10. The method of claim 9 , wherein the SiCN includes a plurality of pores.
11. A method of making a semiconductor device, the method comprising:
forming a gate stack on a substrate;
depositing a first spacer layer on a sidewall of the gate stack by a first plasma enhanced chemical vapor deposition (PECVD) method, the first spacer layer being SiC;
performing a first nitrogen plasma treatment on the first spacer layer; and
depositing a second spacer layer on the first spacer layer by a second PECVD method, the second spacer layer comprising silicon, carbon, and nitrogen.
12. The method of claim 11 further comprising performing a second nitrogen plasma treatment process on the second spacer layer.
13. The method of claim 11 , wherein the first spacer layer has a thickness of about 1 to about 2 nanometers (nm), and the second spacer layer has a thickness of about 2 to about 10 nm.
14. The method of claim 11 , wherein the SiC has a C to Si ratio greater than 1.9.
15. The method of claim 11 , wherein the second spacer layer comprises SiCN with a plurality of pores.