IP Library › Granted Patent US 10,939,107
Granted Patent B2
US 10,939,107 · App. 16/289,873 · Granted Mar 2, 2021

Embedded codec circuitry for sub-block based allocation of refinement bits

Inventors: Mohammed Golam Sarwer (San Jose, CA); Ali Tabatabai (San Jose, CA)
Assignee: SONY CORPORATION
H04N19/124H04N19/176H04N19/91
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Quick Facts
Patent No.
US 10,939,107
App. No.
16/289,873
Granted
Mar 2, 2021
Kind
B2
Abstract

An embedded codec (EBC) circuitry includes a memory to store a plurality of one dimensional (1D) sub-blocks of quantized-transformed residual levels for a 1D image block and encoder circuitry to determine a sub-block category from a set of sub-block categories for each 1D sub-block of the plurality of 1D sub-blocks. The encoder circuitry encodes the plurality of 1D sub-blocks by application of an entropy coding scheme to generate a plurality of encoded 1D sub-blocks. The encoder circuitry allocates a plurality of refinement bits at bit-positions in bit-planes corresponding to encoded quantized-transformed residual levels in an encoded 1D sub-block of the plurality of encoded 1D sub-blocks, based on the determined sub-block category of a corresponding 1D sub-block.

Claims (50)

1. An embedded codec (EBC) circuitry, comprising:

a memory configured to store a plurality of one dimensional (1D) sub-blocks of quantized-transformed residual levels for a 1D image block; and

encoder circuitry configured to:

compare a maximum value of an AC quantized-transformed residual level from a plurality of AC quantized-transformed residual levels for each 1D sub-block of the plurality of 1D sub-blocks with a first reference value and a second reference value;

determine a sub-block category from a set of sub-block categories for each 1D sub-block of the plurality of 1D sub-blocks, based on the comparison of the maximum value of the AC quantized-transformed residual level from the plurality of AC quantized-transformed residual levels in each 1D sub-block of the plurality of 1D sub-blocks with the first reference value and the second reference value, wherein each sub-block category of the set of sub-block categories indicates a different flatness level and a complexity level for a corresponding 1D sub-block of the plurality of 1D sub-blocks;

encode the plurality of 1D sub-blocks by application of an entropy coding scheme to generate a plurality of encoded 1D sub-blocks; and

allocate a plurality of refinement bits at bit-positions in a set of bit-planes corresponding to a set of encoded quantized-transformed residual levels in a first encoded 1D sub-block of the plurality of encoded 1D sub-blocks, based on the sub-block category of a first 1D sub-block of the plurality of 1D sub-blocks, wherein the first 1D sub-block corresponds to the first encoded 1D sub-block.

2. The EBC circuitry according to claim 1 , wherein the encoder circuitry is further configured to encode the 1D image block by a sequential encoding scheme to generate the plurality of encoded 1D sub-blocks,

wherein the sequential encoding scheme comprises a sequential application of a 1D transform, quantization, residual prediction, and the entropy coding scheme.

3. The EBC circuitry according to claim 1 , wherein

the encoder circuitry is further configured to apply a 1D transform on the 1D image block to generate the plurality of 1D sub-blocks, and

each 1D sub-block of the plurality of 1D sub-blocks comprises a DC quantized-transformed residual level and the plurality of AC quantized-transformed residual levels.

4. The EBC circuitry according to claim 3 , wherein

a type of the 1D transform is based on a size of each 1D sub-block of the plurality of 1D sub-blocks, and

the size of each 1D sub-block of the plurality of 1D sub-blocks is specified prior to encode of the 1D image block.

5. The EBC circuitry according to claim 3 , wherein each encoded 1D sub-block of the plurality of encoded 1D sub-blocks comprises a plurality of encoded quantized-transformed residual levels.

6. The EBC circuitry according to claim 5 , wherein

each encoded quantized-transformed residual level of the plurality of encoded quantized-transformed residual levels comprises a set of bits that correspond to a defined bit-depth, and

a number of refinement bits for the allocation of the plurality of refinement bits is based on the defined bit-depth and the set of bits.

7. The EBC circuitry according to claim 5 , wherein

the plurality of encoded quantized-transformed residual levels comprises a DC quantized-transformed residual encoded level corresponding to the DC quantized-transformed residual level and a plurality of AC quantized-transformed residual encoded levels corresponding to the plurality of AC quantized-transformed residual levels, and

the set of encoded quantized-transformed residual levels comprises the DC quantized-transformed residual encoded level and at least one of the plurality of AC quantized-transformed residual encoded levels.

8. The EBC circuitry according to claim 1 , wherein the encoder circuitry is further configured to allocate a set of signaling bits to each 1D sub-block of the plurality of 1D sub-blocks, based on the sub-block category of each 1D sub-block of the plurality of 1D sub-blocks.

9. The EBC circuitry according to claim 8 , wherein the encoder circuitry is further configured to select the set of encoded quantized-transformed residual levels in the first encoded 1D sub-block based on the allocated set of signaling bits to the first 1D sub-block corresponding to the first encoded 1D sub-block.

10. The EBC circuitry according to claim 1 , wherein a count of encoded quantized-transformed residual levels in the set of encoded quantized-transformed residual levels depends on the determined sub-block category of the first 1D sub-block corresponding to the first encoded 1D sub-block.

11. The EBC circuitry according to claim 1 , wherein a count of encoded quantized-transformed residual levels in the set of encoded quantized-transformed residual levels is different for each sub-block category of the set of sub-block categories.

12. The EBC circuitry according to claim 1 ,

wherein the maximum value of the AC quantized-transformed residual level is an absolute maximum value that is greater than or equal to 0.

13. The EBC circuitry according to claim 12 , wherein the first reference value is 0 and the second reference value is 1.

14. The EBC circuitry according to claim 12 , wherein the set of sub-block categories comprises a first sub-block category, a second sub-block category, and a third sub-block category.

15. The EBC circuitry according to claim 14 , wherein the encoder circuitry is further configured to determine the sub-block category for the first 1D sub-block as the first sub-block category based on the comparison, in case the maximum value of the AC quantized-transformed residual level in the first 1D sub-block is equal to the first reference value.

16. The EBC circuitry according to claim 14 , wherein the encoder circuitry is further configured to determine the sub-block category for the first 1D sub-block as the second sub-block category based on the comparison, in case the maximum value of the AC quantized-transformed residual level in the first 1D sub-block is equal to the second reference value.

17. The EBC circuitry according to claim 14 , wherein the encoder circuitry is further configured to determine the sub-block category for the first 1D sub-block as the third sub-block category based on the comparison, in case the maximum value of the AC quantized-transformed residual level in the first 1D sub-block is greater than the second reference value.

18. The EBC circuitry according to claim 14 , wherein

a first count of encoded quantized-transformed residual levels in the set of encoded quantized-transformed residual levels for the second sub-block category is greater than or equal to a second count of encoded quantized-transformed residual levels in the set of encoded quantized-transformed residual levels for the first sub-block category, and

a third count of encoded quantized-transformed residual levels in the set of encoded quantized-transformed residual levels for the third sub-block category is greater than the first count and the second count.

19. The EBC circuitry according to claim 1 , wherein

the encoder circuitry is further configured to determine a refinement order in the first encoded 1D sub-block based on the sub-block category of the first 1D sub-block, and

the refinement order defines a sequence in which the plurality of refinement bits is allocated at the bit-positions in the set of bit-planes.

20. The EBC circuitry according to claim 19 , wherein

the encoder circuitry is further configured to allocate a first refinement bit of the plurality of refinement bits at a first bit-position in the set of bit-planes corresponding to the set of encoded quantized-transformed residual levels, followed by allocation of subsequent refinement bits of the plurality of refinement bits at subsequent positions in the set of bit-planes,

the allocation is based on the determined refinement order, and

the first bit-position corresponds to a first encoded quantized-transformed residual level in the set of encoded quantized-transformed residual levels.

21. A method, comprising:

in an embedded codec (EBC) circuitry that comprises a memory and encoder circuitry:

storing, by the memory, a plurality of one dimensional (1D) sub-blocks of quantized-transformed residual levels for a 1D input image block;

comparing, by the encoder circuitry, a maximum value of an AC quantized-transformed residual level from a plurality of AC quantized-transformed residual levels for each 1D sub-block of the plurality of 1D sub-blocks with a first reference value and a second reference value;

determining, by the encoder circuitry, a sub-block category from a set of sub-block categories for each 1D sub-block of the plurality of 1D sub-blocks, based on the comparison of the maximum value of the AC quantized-transformed residual level from the plurality of AC quantized-transformed residual levels in each 1D sub-block of the plurality of 1D sub-blocks with the first reference value and the second reference value, wherein each sub-block category of the set of sub-block categories indicates a different flatness level and a complexity level for a corresponding 1D sub-block of the plurality of 1D sub-blocks;

encoding, by the encoder circuitry, the plurality of 1D sub-blocks by application of an entropy coding scheme to generate a plurality of encoded 1D sub-blocks; and

allocating, by the encoder circuitry, a plurality of refinement bits at bit-positions in a set of bit-planes corresponding to a set of encoded quantized-transformed residual levels in a first encoded 1D sub-block of the plurality of encoded 1D sub-blocks, based on the sub-block category of a first 1D sub-block of the plurality of 1D sub-blocks, wherein the first 1D sub-block corresponds to the first encoded 1D sub-block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2019
From: SARWER, MOHAMMED GOLAM; TABATABAI, ALI
To: SONY CORPORATION
Reel/Frame 048494/0475 →
Continuity (1)
Related Publication 20200280720A1 · Sep 3, 2020
Cited By (1)
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