IP Library Granted Patent US 10,943,821
Granted Patent B2
US 10,943,821 · App. 16/521,936 · Granted Mar 9, 2021

Method of manufacturing semiconductor device

Inventors: Toshiyuki Kosaka (Yokohama, JP); Haruo Kawata (Yokohama, JP)
Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
H01L21/76843H01L21/02378H01L21/02642H01L21/0332H01L21/76816H01L21/76829H01L21/76898H01L22/12
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Quick Facts
Patent No.
US 10,943,821
App. No.
16/521,936
Granted
Mar 9, 2021
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes: forming a metal film containing Al on a surface of a substrate product including a substrate and a nitride semiconductor layer on the substrate, the metal film covering a via hole forming predetermined region, and the surface of the substrate product being located on the nitride semiconductor layer side, forming an etching mask having an opening for exposing the via hole forming predetermined region on a back surface of the substrate product, the back surface of the substrate product being located on the substrate side, and forming a via hole in the substrate product by reactive ion etching, the via hole reaching the surface from the back surface and exposing the metal film. In the forming of the via hole, a reaction gas containing fluorine is used during a period at least including a termination of etching.

Claims (25)

1. A method of manufacturing a semiconductor device, comprising:

forming a metal film containing Al on a surface of a substrate product including a substrate and a nitride semiconductor layer on the substrate, the metal film covering a via hole forming predetermined region, and the surface of the substrate product being located on the nitride semiconductor layer side;

forming an etching mask having an opening for exposing the via hole forming predetermined region on a back surface of the substrate product, the back surface of the substrate product being located on the substrate side;

forming a via hole in the substrate product by reactive ion etching, the via hole reaching the surface from the back surface and exposing the metal film;

forming an etch stopper film containing aluminum fluoride and aluminum oxide on the exposed metal film; and

removing the etch stopper film on the exposed metal film,

wherein, in the forming the via hole, a reaction gas containing fluorine is used during a period at least including a termination of etching.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the substrate is a SiC substrate, and

wherein, in the forming the via hole, at least a portion of the SiC substrate in the via hole forming predetermined region is etched using the reaction gas containing fluorine.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the etching mask contains at least one of Ni and Cu.

4. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the reaction gas containing fluorine is a mixed gas of SF 6 and O 2 .

5. The method of manufacturing a semiconductor device according to claim 1 ,

wherein, in the forming the via hole, the nitride semiconductor layer in the via hole forming predetermined region is etched using the reaction gas containing fluorine.

6. The method of manufacturing a semiconductor device according to claim 1 ,

wherein, in the forming the via hole, a portion of the nitride semiconductor layer in the via hole forming predetermined region is etched using a reaction gas containing chlorine, and the remaining portion of the nitride semiconductor layer in the via hole forming predetermined region is then etched using the reaction gas containing fluorine.

7. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

after the forming the via hole, exposing the metal film exposed in the via hole to plasma containing an inert gas.

8. The method of manufacturing a semiconductor device according to claim 7 , wherein the inert gas includes argon gas.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming the metal film includes:

forming a first layer made of Ti or Ta on the surface of the substrate product;

forming a second layer made of Al on the first layer; and

alloying the first layer and the second layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2019
From: KOSAKA, TOSHIYUKI; KAWATA, HARUO
To: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
Reel/Frame 049865/0411 →
Priority Claims (1)
JP JP2018-140011 · Jul 26, 2018 · national
Continuity (1)
Related Publication 20200035551A1 · Jan 30, 2020
Cited By (1)
US 12,457,764