IP Library › Granted Patent US 10,944,911
Granted Patent B2
US 10,944,911 · App. 14/920,932 · Granted Mar 9, 2021

Image data processing for digital overlap wide dynamic range sensors

Inventor: Shashank Dabral (Allen, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H04N5/2353H04N5/2355H04N5/2356H04N5/23232H04N5/77
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Quick Facts
Patent No.
US 10,944,911
App. No.
14/920,932
Granted
Mar 9, 2021
Kind
B2
Abstract

Methods and integrated circuits to process image data from single or multiple digital overlap (DOL) wide dynamic range (WDR) sensors, in which first received pixel data associated with a first exposure of a sensor image is stored in a DDR memory circuit, second received pixel data associated with a second exposure of the image is stored in the first buffer, third received pixel data associated with a third exposure of the image is stored in a second buffer, and fourth received pixel data associated with a fourth exposure of the image is provided to a merge circuit, and merged pixel data is stored in a dynamically partitioned line buffer for processing by an image pipeline circuit to facilitate interfacing multiple DOL WDR sensors in an interleaved fashion.

Claims (33)

1. An integrated circuit comprising:

a dual data rate (DDR) memory circuit;

a memory buffer;

a first pixel data interface circuit adapted to be coupled to a first digital overlap (DOL) wide dynamic range (WDR) sensor and configured to:

receive a first pixel data from the first DOL WDR sensor for a first exposure;

receive a second pixel data from the first DOL WDR sensor for a second exposure, the first exposure having a longer exposure time than the second exposure;

store the first pixel data in the DDR memory circuit;

store the second pixel data in the memory buffer;

a second pixel data interface circuit adapted to be coupled to a second DOL WDR sensor and configured to:

receive a third pixel data from the second DOL WDR sensor for a third exposure;

receive a fourth pixel data from the second DOL WDR sensor for a fourth exposure;

store the third pixel data in the memory buffer;

communicate the fourth pixel data to the processing circuit without any buffering; and

a processing circuit coupled to the DDR memory circuit and the memory buffer, the processing circuit configured to:

generate a higher dynamic range image by merging the first pixel data in the DDR memory circuit, the second pixel data in the memory buffer, the third pixel data in the DDR memory circuit, and the fourth pixel data; and

generate statistical data for the first DOL WDR sensor and second DOL WDR sensor.

2. The integrated circuit of claim 1 , wherein the processing circuit comprises an image pipeline circuit configured to process the higher dynamic range image.

3. The integrated circuit of claim 2 , comprising:

a statistics buffer including a plurality of statistics buffer partitions configured to store the statistical data for processing by the image pipeline circuit; and

a multiplexer operative according to select signal to provide selected statistical data from the statistics buffer to the image pipeline circuit.

4. The integrated circuit of claim 2 , wherein the processing circuit further comprises a line buffer configured to store at least one line of pixel data for the higher dynamic range image.

5. The integrated circuit of claim 4 , wherein the line buffer comprises a plurality of partitions and the line buffer is dynamically configurable to define the plurality of partitions.

6. A method comprising:

receiving a first pixel data from a first digital overlap (DOL) wide dynamic range (WDR) sensor for a first exposure;

receiving a second pixel data from the first DOL WDR sensor for a second exposure, the first exposure having a longer exposure time than the second exposure;

receiving a third pixel data from a second DOL WDR sensor for a third exposure;

receiving a fourth pixel data from a second DOL WDR sensor for a fourth exposure, the third exposure having a longer exposure time than the fourth exposure;

storing the first pixel data in a dual data rate (DDR) memory circuit;

storing the second pixel data and third pixel data in a memory buffer;

communicating the fourth pixel data to a processing circuit without any buffering

generating, by the processing circuit, a higher dynamic range image by merging the first pixel data in the DDR memory circuit, the second pixel data in the memory buffer, the third pixel data in the memory buffer, and the fourth pixel data; and

generating statistical data for the first DOL WDR sensor and second DOL WDR sensor.

7. The method of claim 6 , further comprising storing at least one line of the higher dynamic range image in a line buffer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2015
From: DABRAL, SHASHANK
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 036863/0453 →
Continuity (2)
Provisional Application 62068185 · Oct 24, 2014
Related Publication 20160119575A1 · Apr 28, 2016