Semiconductor package floating metal checks
Embodiments of the invention include methods, systems, and computer program products for checking floating metals in a laminate structure. Aspects of the invention include receiving, by a processor, floating metal rules and a semiconductor package design having a plurality of laminate layers. Each laminate layer includes a plurality of metal shapes, a plurality of signal lines, and a plurality of vias. The metal shapes, signal lines, and vias are mapped to one or more cells in an array. The processor determines, for each cell corresponding to a metal shape, whether the plurality of vias satisfies the floating metal rules. The processor can suggest new vias to satisfy the floating metal rules.
1. A computer-implemented method for checking floating metals in a laminate structure, the method comprising:
receiving, by the processor, a semiconductor package design comprising a plurality of laminate layers, the laminate layers each comprising one or more metal shapes and one or more vias;
receiving, by a processor, floating metal rules comprising maximum internal via-via and external edge-via distances allowed within voltage shapes;
mapping each of the metal shapes and vias to one or more cells in an array, wherein each cell in the array comprises a number and each digit in the number corresponds to a unique location on a laminate layer in the semiconductor package design; and
determining whether the vias satisfy the floating metal rules.
2. The method of claim 1 further comprising displaying on a user interface a list of metal shapes that did not satisfy the floating metal rules.
3. The method of claim 1 further comprising:
identifying one or more metal shapes that did not satisfy the floating metal rules; and
suggesting, for each metal shape of the one or more metal shapes that did not satisfy the floating metal rules, one or more new vias that would satisfy the floating metal rules for each respective metal shape.
4. The method of claim 1 , wherein each cell in the array comprises a 32-digit binary number.
5. The method of claim 4 , wherein each unique location corresponds to a two micron by two micron pixel.
6. The method of claim 5 , wherein mapping each of the one or more metal shapes to one or more cells in the array comprises setting a value of all binary digits in each of the cells in the array to 0 or 1, wherein a value of 1 indicates a presence of a metal shape.
7. The method of claim 5 further comprising determining, for a pixel comprising a first metal shape of the one or more metal shapes, whether one or more vias exists within a radius of the pixel.
8. The method of claim 7 further comprising determining, for a first via within the radius of the pixel, whether a connected path exists between the first via and the first metal shape.
9. The method of claim 8 , wherein the connected path is generated using a Dijkstra shortest-path algorithm.
10. A system for checking floating metals in a laminate structure, the system having a processor coupled to a memory, the processor configured to:
receive a semiconductor package design comprising a plurality of laminate layers, the laminate layers each comprising one or more metal shapes and one or more vias;
receive floating metal rules comprising maximum internal via-via and external edge-via distances allowed within voltage shapes;
map each of the metal shapes and vias to one or more cells in an array, wherein each cell in the array comprises a number and each digit in the number corresponds to a unique location on a laminate layer in the semiconductor package design; and
determine whether the vias satisfy the floating metal rules.
11. The system of claim 10 , wherein each cell in the array comprises a 32-digit binary number.
12. The system of claim 11 , wherein each unique location corresponds to a two micron by two micron pixel.
13. The system of claim 12 further comprising determining, for a pixel comprising a first metal shape of the one or more metal shapes, whether one or more vias exists within a radius of the pixel.
14. The system of claim 13 further comprising determining, for a first via within the radius of the pixel, whether a connected path exists between the first via and the first metal shape.
15. The system of claim 14 , wherein the connected path is generated using a Dijkstra shortest-path algorithm.
16. A computer program product for checking floating metals in a laminate structure, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:
receive a semiconductor package design comprising a plurality of laminate layers, the laminate layers each comprising one or more metal shapes and one or more vias;
receive floating metal rules comprising maximum internal via-via and external edge-via distances allowed within voltage shapes;
map each of the metal shapes and vias to one or more cells in an array, wherein each cell in the array comprises a number and each digit in the number corresponds to a unique location on a laminate layer in the semiconductor package design; and
determine whether the vias satisfy the floating metal rules.
17. The computer program product of claim 16 further comprising displaying on a user interface a list of metal shapes that did not satisfy the floating metal rules.
18. The computer program product of claim 16 further comprising:
identifying one or more metal shapes that did not satisfy the floating metal rules; and
suggesting, for each metal shape of the one or more metal shapes that did not satisfy the floating metal rules, one or more new vias that would satisfy the floating metal rules for each respective metal shape.
19. The computer program product of claim 16 , wherein each cell in the array comprises a 32-digit binary number.
20. The computer program product of claim 19 , wherein each unique location is a two micron by two micron pixel.